Invention Grant
- Patent Title: Transistor structure with varied gate cross-sectional area
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Application No.: US15073740Application Date: 2016-03-18
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Publication No.: US09966457B2Publication Date: 2018-05-08
- Inventor: Dominic J. Schepis , Alexander Reznicek , Pranita Kerber , Qiqing C. Ouyang
- Applicant: GLOBALFOUNDRIES INC.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Hoffman Warnick LLC
- Agent Yuanmin Cai
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L21/321 ; H01L21/306 ; H01L21/324 ; H01L21/768

Abstract:
Aspects of the present disclosure include finFET structures with varied cross-sectional areas and methods of forming the same. Methods according to the present disclosure can include, e.g., forming a structure including: a semiconductor fin positioned on a substrate, wherein the semiconductor fin includes: a gate area, and a terminal area laterally distal to the gate area, a sacrificial gate positioned on the gate area of the semiconductor fin, and an insulator positioned on the terminal area of the semiconductor fin; removing the sacrificial gate to expose the gate area of the semiconductor fin; increasing or reducing a cross-sectional area of the gate area of the semiconductor fin; and forming a transistor gate on the gate area of the semiconductor fin.
Public/Granted literature
- US20170271483A1 TRANSISTOR STRUCTURE WITH VARIED GATE CROSS-SECTIONAL AREA Public/Granted day:2017-09-21
Information query
IPC分类: