Invention Grant
- Patent Title: Semiconductor device and battery voltage measuring method that prevents measurement error caused by parametric capacitance
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Application No.: US14974392Application Date: 2015-12-18
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Publication No.: US09966768B2Publication Date: 2018-05-08
- Inventor: Naoaki Sugimura
- Applicant: LAPIS Semiconductor Co., Ltd.
- Applicant Address: JP Yokohama
- Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee: LAPIS SEMICONDUCTOR CO., LTD.
- Current Assignee Address: JP Yokohama
- Agency: Volentine & Whitt, PLLC
- Priority: JP2014-263050 20141225
- Main IPC: H02J7/00
- IPC: H02J7/00 ; H03L5/00 ; G01R31/36

Abstract:
The present disclosure provides a semiconductor device including: a first buffer amplifier into which a voltage of a high potential side of one battery cell selected from plural battery cells that are connected in series is input; a second buffer amplifier into which a voltage of a low potential side of the one battery cell other than a lowermost stage battery cell is input; an analog level shifter into which a voltage output from the first buffer amplifier and a voltage output from, the buffer amplifier are input; a first switch that switches a voltage input to the analog level shifter from the voltage output from the second buffer amplifier to a reference voltage; and a second switch that switches a voltage input to the first buffer amplifier from the voltage of the high potential side of the one battery cell to the reference voltage.
Public/Granted literature
- US20160190832A1 SEMICONDUCTOR DEVICE AND BATTERY VOLTAGE MEASURING METHOD Public/Granted day:2016-06-30
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