Invention Grant
- Patent Title: Methods of fabricating three-dimensional semiconductor devices
-
Application No.: US14621568Application Date: 2015-02-13
-
Publication No.: US09972638B2Publication Date: 2018-05-15
- Inventor: Sunghae Lee , Daehong Eom , JinGyun Kim , Daehyun Jang , Kihyun Hwang , Seongsoo Lee , Kyunghyun Kim , Chadong Yeo , Jun-Youl Yang , Se-Ho Cha
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Lee & Morse, P.C.
- Priority: KR10-2011-0028320 20110329; KR10-2011-0029808 20110331
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/11582 ; H01L29/78 ; H01L21/283 ; H01L21/311 ; H01L27/11556 ; H01L29/66

Abstract:
Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly stacked on a substrate, and a cutting region penetrating an uppermost sacrificial layer of the sacrificial layers is formed. The cutting region is filled with a non sacrificial layer. The insulating layers and the sacrificial layers are patterned to form a mold pattern. The mold pattern includes insulating patterns, sacrificial patterns, and the non sacrificial layer in the cutting region. The sacrificial patterns may be replaced with electrodes. The related semiconductor memory device is also provided.
Public/Granted literature
- US20150162344A1 METHODS OF FABRICATING THREE-DIMENSIONAL SEMICONDUCTOR DEVICES Public/Granted day:2015-06-11
Information query
IPC分类: