According to one aspect, embodiments of the invention provide a system for monitoring a plurality of circuit branches coupled to an input line, the system comprising a communication bus, a controller having a primary clock with a first clock value and configured to sample voltage on the input line based on the first clock value, a plurality of sensor circuits, each sensor circuit having a secondary clock with a second clock value and configured to sample current in the at least one of the plurality of circuit branches based on the second clock value, and wherein the controller is further configured to initiate, via the communication bus, synchronization of at least one secondary clock and the primary clock, and to synchronize, via the communication bus, the at least one secondary clock and the primary clock to account for transmission latency in the communication bus.