Invention Grant
- Patent Title: Semiconductor memory device
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Application No.: US15233658Application Date: 2016-08-10
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Publication No.: US09984761B2Publication Date: 2018-05-29
- Inventor: Hiroshi Maejima , Koji Hosono , Tadashi Yasufuku , Noboru Shibata
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: Patterson & Sheridan, LLP
- Priority: JP2015-246749 20151217
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/34 ; G11C11/56 ; G11C16/04

Abstract:
A semiconductor memory device includes first and second memory cells, each of which includes a charge storage layer, a first bit line that is connected to the first memory cell, and a second bit line that is connected to the second memory cell. A writing operation includes multiple loops of a programming operation and a verification operation, and first data is written in the first memory cell, and second data different from the first data is written in the second memory cell through the writing operation. In a first loop of the writing operation, a first voltage is applied to the first bit line and the second bit line is maintained in an electrically floating state during the programming operation, and a verification operation relating to the second data is not performed and a verification operation relating to the first data is performed.
Public/Granted literature
- US20170178739A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2017-06-22
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