Invention Grant
- Patent Title: Integrated circuit and manufacturing method thereof
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Application No.: US15074985Application Date: 2016-03-18
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Publication No.: US09985031B2Publication Date: 2018-05-29
- Inventor: Che-Cheng Chang , Chih-Han Lin , Horng-Huei Tseng
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW
- Agency: Cooper Legal Group, LLC
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L29/66 ; H01L29/423 ; H01L21/8238 ; H01L21/3215

Abstract:
An integrated circuit includes a substrate, at least one n-type semiconductor device, and at least one p-type semiconductor device. The n-type semiconductor device is present on the substrate. The n-type semiconductor device includes a gate structure having a bottom surface and at least one sidewall. The bottom surface of the gate structure of the n-type semiconductor device and the sidewall of the gate structure of the n-type semiconductor device intersect to form an interior angle. The p-type semiconductor device is present on the substrate. The p-type semiconductor device includes a gate structure having a bottom surface and at least one sidewall. The bottom surface of the gate structure of the p-type semiconductor device and the sidewall of the gate structure of the p-type semiconductor device intersect to form an interior angle smaller than the interior angle of the gate structure of the n-type semiconductor device.
Public/Granted literature
- US20170213828A1 INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-07-27
Information query
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