Invention Grant
- Patent Title: Integrated circuitry and 3D memory
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Application No.: US14995709Application Date: 2016-01-14
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Publication No.: US09985040B2Publication Date: 2018-05-29
- Inventor: David Daycock
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; H01L27/11551 ; H01L27/11526 ; H01L27/11573 ; H01L27/11578 ; G11C5/02 ; H01L27/11582

Abstract:
Integrated circuitry has an array circuitry region having a repeating array of electronic components. An adjacent circuitry region is immediately laterally adjacent to and contacts one elongated major peripheral side of the array circuitry region. The adjacent circuitry region is distinct in structure from the array circuitry region where contacting the array circuitry region and distinct in operation from the array circuitry region. The array circuitry region and the adjacent circuitry region have a respective longitudinally non-linear edge at an interface relative one another along the one elongated major peripheral side of the array circuitry region. Other embodiments are disclosed.
Public/Granted literature
- US20170206964A1 Integrated Circuitry and 3D Memory Public/Granted day:2017-07-20
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