Invention Grant
- Patent Title: Digital duty cycle correction for frequency multiplier
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Application No.: US15153496Application Date: 2016-05-12
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Publication No.: US09985618B2Publication Date: 2018-05-29
- Inventor: Dongmin Park , Jong Min Park , Lai Kan Leung
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Qualcomm Incorporated-Toler
- Main IPC: H03D3/24
- IPC: H03D3/24 ; H03K5/156 ; H03L7/081 ; H03L7/089 ; H03L7/091 ; H03L7/093 ; H03L7/16 ; H04L7/00 ; H04L7/033
Abstract:
An apparatus includes a phase detector coupled to an output of a frequency multiplier. A digital loop filter is coupled to the phase detector, and a duty cycle correction circuit is coupled to the digital loop filter.
Public/Granted literature
- US20170187364A1 DIGITAL DUTY CYCLE CORRECTION FOR FREQUENCY MULTIPLIER Public/Granted day:2017-06-29
Information query
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