Invention Grant
- Patent Title: Packaged electronic devices with top terminations, and methods of manufacture thereof
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Application No.: US14549934Application Date: 2014-11-21
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Publication No.: US09986646B2Publication Date: 2018-05-29
- Inventor: Lakshminarayan Viswanathan , Audel A. Sanchez , Fernando A. Santos , Jerry L. White
- Applicant: FREESCALE SEMICONDUCTOR, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, INC.
- Current Assignee: NXP USA, INC.
- Current Assignee Address: US TX Austin
- Agent Sherry W. Schumm
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H05K3/28 ; H05K1/16 ; H05K7/00 ; H05K9/00 ; H01L21/56 ; H01L33/52 ; H01L31/0203 ; H01L23/28 ; H01L23/22 ; H01L31/048 ; H05K3/34

Abstract:
An embodiment of an electronic device includes a circuit component (e.g., a transistor or other component) coupled to the top surface of a substrate. Encapsulation is formed over the substrate and the component. An opening in the encapsulation extends from the encapsulation top surface to a conductive feature on the top surface of the component. A conductive termination structure within the encapsulation opening extends from the conductive feature to the encapsulation top surface. The device also may include a second circuit physically coupled to the encapsulation top surface and electrically coupled to the component through the conductive termination structure. In an alternate embodiment, the conductive termination structure may be located in a trench in the encapsulation that extends between two circuits that are embedded within the encapsulation, where the conductive termination structure is configured to reduce electromagnetic coupling between the two circuits during device operation.
Public/Granted literature
- US20160150632A1 PACKAGED ELECTRONIC DEVICES WITH TOP TERMINATIONS, AND METHODS OF MANUFACTURE THEREOF Public/Granted day:2016-05-26
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