Source beam optimization (SBO) methods are disclosed herein for enhancing lithography printability. An exemplary method includes receiving an integrated circuit (IC) design layout and performing an SBO process using the IC design layout to generate a mask shot map and an illumination source map. The SBO process uses an SBO model that collectively simulates a mask making process using the mask shot mask and a wafer making process using the illumination source map. A mask can be fabricated using the mask shot map, and a wafer can be fabricated using the illumination source map (and, in some implementations, using the mask fabricated using the mask shot map). The wafer includes a final wafer pattern that corresponds with a target wafer pattern defined by the IC design layout. The SBO methods disclosed herein can significantly reduce (or eliminate) variances between the final wafer pattern and the target wafer pattern.