Invention Grant
- Patent Title: Test key strcutures, integrated circuit packages and methods of forming the same
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Application No.: US15162630Application Date: 2016-05-24
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Publication No.: US09991207B2Publication Date: 2018-06-05
- Inventor: Shao-Yun Chen , Hsien-Wei Chen , Li-Hsien Huang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L23/544
- IPC: H01L23/544 ; H01L23/528 ; H01L21/66 ; H01L23/48 ; H01L25/18 ; H01L21/56 ; H01L21/78 ; H01L23/00 ; H01L21/683 ; H01L25/065 ; H01L21/768
Abstract:
Test key structures, integrated circuit packages and methods of forming the same are disclosed. One of the test key structures includes a first pattern over a polymer layer, and at least one second pattern covering the first pattern. Besides, the second pattern and the first pattern have substantially the same outer profile, one of the first pattern and the second pattern includes a dielectric material and the other of the first pattern and the second pattern includes a metal material.
Public/Granted literature
- US20170278802A1 TEST KEY STRCUTURES, INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME Public/Granted day:2017-09-28
Information query
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