Invention Grant
- Patent Title: Electrostatic protection circuit and semiconductor integrated circuit apparatus
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Application No.: US14940489Application Date: 2015-11-13
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Publication No.: US09991698B2Publication Date: 2018-06-05
- Inventor: Masuhide Ikeda
- Applicant: SEIKO EPSON CORPORATION
- Applicant Address: JP Tokyo
- Assignee: SEIKO EPSON CORPORATION
- Current Assignee: SEIKO EPSON CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Oliff PLC
- Priority: JP2014-237948 20141125
- Main IPC: H02H3/22
- IPC: H02H3/22 ; H02H9/04 ; H05K1/02

Abstract:
This electrostatic protection circuit makes it possible for a discharge operation to be started only in the case where a rise in an applied voltage is steep, and for static electricity to be sufficiently released. This electrostatic protection circuit includes a discharge circuit that is connected between a first node and a second node and discharges charge produced by static electricity, a latch circuit that is connected between the first node and the second node and outputs a signal that controls operation of the discharge circuit to the discharge circuit, a switch circuit that is connected to the latch circuit and changes the signal that controls operation of the discharge circuit, and a control circuit that is connected between the first node and the second node and outputs a signal that controls operation of the switch circuit to the switch circuit.
Public/Granted literature
- US20160149403A1 ELECTROSTATIC PROTECTION CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS Public/Granted day:2016-05-26
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