Invention Grant
- Patent Title: Decoder, receiver, and electronic device
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Application No.: US15729169Application Date: 2017-10-10
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Publication No.: US09992442B2Publication Date: 2018-06-05
- Inventor: Takeshi Aoki , Munehiro Kozuma , Yoshiyuki Kurokawa
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2016-202007 20161013
- Main IPC: H04N5/455
- IPC: H04N5/455 ; H03M99/00 ; G11C14/00

Abstract:
A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.
Public/Granted literature
- US20180109752A1 DECODER, RECEIVER, AND ELECTRONIC DEVICE Public/Granted day:2018-04-19
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