Invention Grant
- Patent Title: Time division duplex (TDD) subframe structure supporting single and multiple interlace modes
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Application No.: US15051949Application Date: 2016-02-24
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Publication No.: US09992790B2Publication Date: 2018-06-05
- Inventor: Jing Jiang , Peter Pui Lok Ang , Krishna Kiran Mukkavilli , Tingfang Ji , John Edward Smee
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Loza & Loza, LLP
- Main IPC: H04J3/00
- IPC: H04J3/00 ; H04W72/12 ; H04L5/14 ; H04L5/00

Abstract:
Aspects of the present disclosure provide a time division duplex (TDD) subframe structure that supports both single and multiple interlace modes of operation. In a single interlace mode, control information, data information corresponding to the control information and acknowledgement information corresponding to the data information are included in a single subframe. In a multiple interlace mode, at least one of the control information, the data information corresponding to the control information or the acknowledgement information corresponding to the data information is included in a different subframe. Both single and multiple interlace modes can be multiplexed together within the TDD subframe structure.
Public/Granted literature
- US20170026992A1 TIME DIVISION DUPLEX (TDD) SUBFRAME STRUCTURE SUPPORTING SINGLE AND MULTIPLE INTERLACE MODES Public/Granted day:2017-01-26
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