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    CAPACITOR DEVICE COMPRISING A STACKED MULTILAYER CAPACITOR
    1.
    发明申请
    CAPACITOR DEVICE COMPRISING A STACKED MULTILAYER CAPACITOR 审中-公开
    包含堆叠多层电容器的电容器件

    公开(公告)号：WO2010042130A1

    公开(公告)日：2010-04-15

    申请号：PCT/US2008/081096

    申请日：2008-10-24

    Applicant: PRESIDIO COMPONENTS, INC. ,  DEVOE, Daniel

    Inventor： DEVOE, Daniel

    IPC: H01G4/232 ,  H01G4/30

    CPC classification number: H01G4/232 ,  H01G4/30 ,  H01G4/38 ,  Y10T29/53174

    Abstract: A capacitor device (6Oj), which is mountable on a plane of a substrate (30), has an electrically conductive bottom plate (64) adapted to be mounted substantially parallel to, and in electrical contact with, the plane of the substrate (30). A multilayer capacitor (68a) has substantially parallel first and second electrode plates (27) oriented substantially perpendicular to the bottom plate (64) with the first electrode plates (27) being electrically connected to the bottom plate (64). An electrically conductive top lead frame (140) overlaps with, and is electrically isolated from, the bottom plate (64). The top lead frame (140) is electrically connected to the second electrode plates (27) and adapted to be electrically connected to the plane of the substrate (30) by a separate electrically conductive element (142).

    Abstract translation: 可安装在基板（30）的平面上的电容器装置（60j）具有导电底板（64），其适于基本平行于基板（30）的平面并与之接触地安装 ）。 多层电容器（68a）具有基本上平行的第一和第二电极板（27），其基本上垂直于底板（64）定向，其中第一电极板（27）电连接到底板（64）。 导电顶部引线框架（140）与底板（64）重叠并与底板（64）电隔离。 顶引线框架（140）电连接到第二电极板（27），并且适于通过单独的导电元件（142）电连接到基板（30）的平面。

    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance
    2.
    发明申请
    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance 审中-公开

    公开(公告)号：US20190043669A1

    公开(公告)日：2019-02-07

    申请号：US16156708

    申请日：2018-10-10

    Applicant: Presidio Components. Inc.

    Inventor： Hung Van Trinh ,  Alan Devoe ,  Lambert Devoe

    IPC: H01G4/30 ,  H01G4/12

    Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is at least partially enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

    Capacitor assemblies, energy storage modules and assemblies, and methods of making same
    3.
    发明授权
    Capacitor assemblies, energy storage modules and assemblies, and methods of making same 有权

    公开(公告)号：US10163573B1

    公开(公告)日：2018-12-25

    申请号：US14934404

    申请日：2015-11-06

    Applicant: Presidio Components. Inc.

    Inventor： Alan Devoe

    IPC: H01G2/00 ,  H01G5/019 ,  H01G5/06 ,  H01G4/228 ,  H01G9/10 ,  H05K5/03 ,  H01G4/38 ,  H01G2/14 ,  H01G5/017 ,  H01G13/00 ,  H01G4/04

    Abstract: A capacitor assembly includes a capacitor having ends. A terminal covers less than an area of one end. A wire bond has opposing ends with one end being coupled to the terminal and is configured to break connection with a circuit when an electrical current through the wire bond reaches a fusing current. An energy storage module includes at least two capacitor assemblies. The wire bond of one capacitor is electrically connected to the second terminal of an adjacent capacitor. An energy storage assembly includes two energy storage modules stacked one on top of the other. A pulse forming network includes conductors and at least two energy storage modules. A method of making a module includes charging each of the capacitors, removing each capacitor that fails, connecting one end of a wire bond to one terminal and connecting the other end to an adjacent capacitor or to a conductor.

    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance
    4.
    发明申请
    Multilayer Broadband Ceramic Capacitor with Internal Air Gap Capacitance 审中-公开

    公开(公告)号：US20180294102A1

    公开(公告)日：2018-10-11

    申请号：US15942987

    申请日：2018-04-02

    Applicant: Presidio Components. Inc.

    Inventor： Hung Van Trinh ,  Alan Devoe ,  Lambert Devoe

    IPC: H01G4/30 ,  H01G4/12 ,  H01G4/005

    Abstract: A monolithic ceramic capacitor has a plurality of dielectric layers and a plurality of conductive layers sintered together to form a substantially monolithic ceramic body. The ceramic body defines at least one void between the dielectric and conductive layers. The void is wholly enclosed within the ceramic body and bounded by at least a portion of a dielectric layer, a first conductive layer, and a second conductive layer. Within the dielectric body, the first and second conductive layers are connected in a nonconductive manner.

    Helically ribbed electroplating barrel
    7.
    发明授权
    Helically ribbed electroplating barrel 有权

    公开(公告)号：US11352709B1

    公开(公告)日：2022-06-07

    申请号：US16560383

    申请日：2019-09-04

    Applicant: Presidio Components. Inc.

    Inventor： Hung Van Trinh

    IPC: C25D17/20 ,  C25D5/22

    Abstract: A rotatable electroplating barrel for electroplating articles, the electroplating barrel having a proximal end with a centrally formed aperture and a distal end with at least one helical rib extending circumferentially along a longitudinal axis and between the proximal end and the distal end. The at least one helical rib, proximal end, and distal end of the electroplating barrel are formed integrally as a unitary piece and have a contiguous perforated outer wall configured to couple directly to the proximal and distal ends, extending therearound to enclose the at least one helical rib.

    High voltage fringe-effect capacitor
    9.
    发明授权
    High voltage fringe-effect capacitor 有权

    公开(公告)号：US10741330B1

    公开(公告)日：2020-08-11

    申请号：US16372991

    申请日：2019-04-02

    Applicant: Presidio Components. Inc.

    Inventor： Hung Van Trinh ,  Alan Devoe

    IPC: H01G4/35 ,  H01G4/005 ,  H01G4/30 ,  H01G4/012

    Abstract: A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.

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