公开(公告)号：JP5406856B2

公开(公告)日：2014-02-05

申请号：JP2010544680

申请日：2009-01-28

Applicant: エスティマイクロエレクトロニクス(グルノーブル)エスエーエスStmicroelectronics(Grenoble)Sas

Inventor： プラネル、フィリップ ,  モネ、ルネ

IPC: G01R31/26

CPC classification number: G01R31/2893 ,  G01R1/0483 ,  H01L21/67132 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49155 ,  Y10T29/53022 ,  Y10T29/5313

公开(公告)号：JP2011512522A

公开(公告)日：2011-04-21

申请号：JP2010544680

申请日：2009-01-28

Applicant: エスティマイクロエレクトロニクス(グルノーブル)エスエーエスStmicroelectronics(Grenoble)Sas

Inventor： プラネル、フィリップ ,  モネ、ルネ

IPC: G01R31/26

CPC classification number: G01R31/2893 ,  G01R1/0483 ,  H01L21/67132 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49155 ,  Y10T29/53022 ,  Y10T29/5313

Abstract: 電子モジュール（８）が電子モジュールの操作及びテストのための機器に対して移送される。 移送は電子モジュールを受入れるための開口（３）を有する薄い台（１）より成される。 薄い台に関連する位置決め機構が移送及びテスト機器に対して台を位置決めするよう役立つ。 機構（４）が移送及びテスト中、開口内に受け入れられた電子モジュールを保持するために設けられる。
【選択図】図３

公开(公告)号：WO2009141402A1

公开(公告)日：2009-11-26

申请号：PCT/EP2009/056183

申请日：2009-05-20

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  COFFY, Romain

Inventor： COFFY, Romain

IPC: G01R31/28 ,  G01R1/20 ,  H01L21/66 ,  H01L23/485

CPC classification number: G01R31/2884 ,  G01R1/0408 ,  G01R31/2822 ,  H01L22/32 ,  H01L24/03 ,  H01L24/05 ,  H01L24/10 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L2224/03 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/0558 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/11 ,  H01L2924/00

Abstract: A method for manufacturing and for testing an integrated circuit, including the steps of forming, on the upper portion of the integrated circuit (1), a passivation layer (19) comprising openings at the level of metal tracks (17) of the last interconnect stack of the integrated circuit; forming, in the openings, first pads (11) connected to second pads (13) formed on the passivation layer by conductive track sections, the first pads being intended for the connection of the integrated circuit; testing the integrated circuit by bringing test tips in contact with the second pads; and eliminating at least a portion of at least one of the conductive track sections.

Abstract translation: 一种用于制造和测试集成电路的方法，包括以下步骤：在集成电路（1）的上部形成钝化层（19），该钝化层包括位于最后互连的金属轨道（17）的开口处的开口 堆叠的集成电路; 在所述开口中形成通过导电轨道部分连接到形成在所述钝化层上的第二焊盘（13）的第一焊盘（11），所述第一焊盘用于连接所述集成电路; 通过将测试头与第二个焊盘接触来测试集成电路; 以及消除所述导电轨道部分中的至少一个的至少一部分。

公开(公告)号：WO2009127724A1

公开(公告)日：2009-10-22

申请号：PCT/EP2009/054594

申请日：2009-04-17

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  TOUZARD, Olivier ,  SORDET, Fabien

Inventor： TOUZARD, Olivier ,  SORDET, Fabien

IPC: H03F3/45 ,  H03F1/26 ,  H03F1/32

CPC classification number: H03F3/4508 ,  H03F1/26 ,  H03F1/3211 ,  H03F3/45484 ,  H03F2200/372 ,  H03F2203/45296 ,  H03F2203/45298 ,  H03F2203/45318 ,  H03F2203/45338 ,  H03F2203/45392 ,  H03F2203/45632

Abstract: An RF amplifier comprising first and second branches (205, 206) coupled in parallel between first and second supply voltage terminals,and a differential pair including first and second transistors (207, 208) each having first and second main current terminals, the second main current terminal of the first transistor being coupled by a first capacitor (228, 226) to the first main current terminal of the second transistor, and the second main current terminal of the second transistor being coupled by a second capacitor (226, 228) to the first main current terminal of the first transistor, wherein the first branch includes a first resistor (213, 302) coupled between the first main current terminal of the first transistor and the second capacitor, and the second branch comprises a second resistor (221, 304) coupled between the first main current terminal of the second transistor and the first capacitor.

Abstract translation: 一种RF放大器，包括在第一和第二电源电压端子之间并联耦合的第一和第二分支（205,206），以及包括第一和第二晶体管（207,208）的差分对，每个具有第一和第二主电流端子，第二主电极 第一晶体管的电流端子由第一电容器（228,226）耦合到第二晶体管的第一主电流端子，并且第二晶体管的第二主电流端子由第二电容器（226,228）耦合到 所述第一晶体管的第一主电流端子，其中所述第一支路包括耦合在所述第一晶体管的所述第一主电流端子和所述第二电容器之间的第一电阻器，所述第二支路包括第二电阻器， 304），其耦合在第二晶体管的第一主电流端子和第一电容器之间。

公开(公告)号：WO2010046724A1

公开(公告)日：2010-04-29

申请号：PCT/IB2008/003660

申请日：2008-10-22

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  STMICROELECTRONICS S.R.L. ,  TENUCCI, Sergio ,  PAGANI, Alberto ,  SPINETTA, Marco ,  RANCHOUX, Bernard

Inventor： TENUCCI, Sergio ,  PAGANI, Alberto ,  SPINETTA, Marco ,  RANCHOUX, Bernard

IPC: G05B19/418 ,  G01R31/28

CPC classification number: G05B19/41875 ,  G01R31/2894 ,  Y02P90/22 ,  Y02P90/86

Abstract: The invention relates to a method for an improved checking of repeatability and reproducibility of a measuring chain, in particular for the quality control by means of the semiconductor device testing, wherein testing steps are provided for multiple and different devices to be subjected to measurement through a measuring system comprising at least one concatenation of measuring units between a testing apparatus (ATE) and each device to be subjected to measurement. Advantageously, the method comprises the following steps: checking repeatability and reproducibility of each type of unit that forms part of the measuring chain of the concatenation; then making a correlation between the various measuring chains as a whole to check repeatability and reproducibility, using a corresponding device subjected to measurement.

Abstract translation: 本发明涉及一种用于改进测量链的重复性和再现性检查的方法，特别是通过半导体器件测试进行质量控制的方法，其中为多个和不同的器件提供测试步骤以通过 测量系统包括测试装置（ATE）和待测量的每个装置之间的测量单元的至少一个级联。 有利地，该方法包括以下步骤：检查构成级联测量链的一部分的每种类型的单元的重复性和重复性; 然后在各测量链之间进行整体的相关性，以检查重复性和再现性，使用相应的测量装置。

公开(公告)号：WO2010031824A1

公开(公告)日：2010-03-25

申请号：PCT/EP2009/062077

申请日：2009-09-17

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  GOULAHSEN, Abdelaziz

Inventor： GOULAHSEN, Abdelaziz

IPC: G06F13/42 ,  H04J11/00

CPC classification number: H04J11/00

Abstract: A method for transmitting messages from first units of an integrated circuit to at least one second unit of the integrated circuit. The first units generate first digital messages and transform them into second digital messages obtained by application of an orthogonal or quasi-orthogonal transformation to the first messages. The second messages of the first units are added up and transmitted to the second unit.

Abstract translation: 一种用于将消息从集成电路的第一单元发送到集成电路的至少一个第二单元的方法。 第一单元产生第一数字消息并将它们转换成通过将正交或准正交变换应用于第一消息而获得的第二数字消息。 第一单元的第二个消息被相加并传送到第二个单元。

公开(公告)号：WO2009095389A1

公开(公告)日：2009-08-06

申请号：PCT/EP2009/050903

申请日：2009-01-28

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  PLANELLE, Philippe ,  MONNET, René

Inventor： PLANELLE, Philippe ,  MONNET, René

IPC: G01R31/28 ,  G01R1/04 ,  H01L21/00

CPC classification number: G01R31/2893 ,  G01R1/0483 ,  H01L21/67132 ,  Y10T29/49002 ,  Y10T29/49117 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49155 ,  Y10T29/53022 ,  Y10T29/5313

Abstract: Electronic modules (8) are transported with respect to equipment for manipulating and testing electronic modules. The transport is formed from a thin support (1) having openings (3) for receiving electronic modules. A locating mechanism associated with the thin support serves to locate the support relative to transport and testing equipment. A mechanism (4) is further provided for holding the received electronic modules within the openings during transport and testing.

Abstract translation: 电子模块（8）相对于用于操纵和测试电子模块的设备进行运输。 运输由具有用于接收电子模块的开口（3）的薄支撑件（1）形成。 与薄支撑件相关联的定位机构用于相对于运输和测试设备定位支撑件。 还提供了一种机构（4），用于在运输和测试期间将接收到的电子模块保持在开口内。

公开(公告)号：WO2010069786A1

公开(公告)日：2010-06-24

申请号：PCT/EP2009/066441

申请日：2009-12-04

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  COFFY, Romain ,  SAUTY, Jean-François

Inventor： COFFY, Romain ,  SAUTY, Jean-François

IPC: H05K9/00 ,  H01L23/552 ,  H05K1/02

CPC classification number: H05K9/0022 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/552 ,  H01L24/97 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01058 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/3025 ,  H05K1/0218 ,  H05K3/284 ,  H05K3/388 ,  H05K2201/0179 ,  H05K2201/09872 ,  Y10T29/49124 ,  H01L2224/81 ,  H01L2924/00

Abstract: A surface-mounted shielded multicomponent assembly, comprising a wafer (1) on which several electronic components (2, 3, 4) are assembled; an insulating layer (30) conformally deposited on the structure with a thickness smaller than the height of the electronic components, comprising at least one opening (31) emerging on a contact (32) of said wafer; a conductive shielding layer (35) covering the insulating layer and said at least one opening; and a resin layer (6) covering the conductive layer.

Abstract translation: 一种表面安装的屏蔽多组件组件，包括其上组装有几个电子部件（2,3,4）的晶片（1） 在所述结构上共形沉积的厚度小于所述电子部件的高度的绝缘层（30），包括在所述晶片的触点（32）上露出的至少一个开口（31） 覆盖绝缘层和所述至少一个开口的导电屏蔽层（35）; 和覆盖导电层的树脂层（6）。

公开(公告)号：WO2010057808A1

公开(公告)日：2010-05-27

申请号：PCT/EP2009/064918

申请日：2009-11-10

Applicant: STMicroelectronics (GRENOBLE) SAS ,  STMicroelectronics S.r.l. ,  COFFY, Romain ,  BRECHIGNAC, Rémi ,  COGNETTI DE MARTIIS, Carlo

Inventor： COFFY, Romain ,  BRECHIGNAC, Rémi ,  COGNETTI DE MARTIIS, Carlo

IPC: H01L25/16 ,  H01L23/538 ,  H01L21/60

CPC classification number: H01L25/50 ,  H01L21/565 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0655 ,  H01L25/0657 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01058 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2224/81 ,  H01L2224/0401

Abstract: A semiconductor device includes at least one first component (5) (for example, a first integrated circuit), having a front face provided with electrical connection pads. The first component is embedded in a support layer (2) is a position such that the front face of the first component is not covered and lies parallel to a first face of the support layer. An intermediate layer (8) is formed on the front face of the first component and on the first face of the support layer. An electrical connection network (9) within the intermediate layer selectively connects to the electrical connection pads of the first component. The device further includes at least one second component (11) (for example, a second integrate circuit, having one face placed above the intermediate layer and provided with electrical connection pads selectively connected to the electrical connection network. Electrical connection vias (17) pass through the support layer and selectively connect the electrical connection network to an external electrical connection formed on a second face of the support layer.

Abstract translation: 半导体器件包括至少一个第一部件（5）（例如，第一集成电路），其具有设置有电连接焊盘的正面。 第一部件嵌入在支撑层（2）中，是使得第一部件的前表面不被覆盖并平行于支撑层的第一面的位置。 在第一部件的正面和支撑层的第一面上形成中间层（8）。 中间层内的电连接网络（9）选择性地连接到第一部件的电连接焊盘。 该装置还包括至少一个第二部件（11）（例如，第二集成电路，其中一个面放置在中间层的上方，并且具有选择性地连接到电连接网络的电连接焊盘）。电连接通孔（17）通过 通过支撑层并且将电连接网络选择性地连接到形成在支撑层的第二面上的外部电连接。

公开(公告)号：WO2010043492A1

公开(公告)日：2010-04-22

申请号：PCT/EP2009/062586

申请日：2009-09-29

Applicant: STMICROELECTRONICS (GRENOBLE) SAS ,  LE-GALL, Hervé

Inventor： LE-GALL, Hervé

IPC: H04B1/69 ,  H04B14/02 ,  H03K5/19

CPC classification number: H03K5/19

Abstract: A method for estimating parameters of a system for spreading the spectrum of a first periodic signal according to a modulation period. An embodiment comprises the steps of sampling the first signal by means of a second periodic signal, of determining based on the sampling result each occurrence where the first and second signals are synchronous, of incrementing a first counter at each sampling, the first counter being reset at each said occurrence, of storing at each said occurrence the last value of the first counter before resetting, of providing a third periodic signal at a first level when said last value is greater than a threshold and at a second level when said last value is smaller than the threshold, and of determining the modulation period based on the period of the third signal.

Abstract translation: 一种用于估计用于根据调制周期扩展第一周期信号的频谱的系统的参数的方法。 一个实施例包括以下步骤：借助于第二周期信号对第一信号进行采样，根据每个采样结果确定第一和第二信号是同步的，在每次采样时递增第一个计数器，第一个计数器被复位 在每个所述发生时，在每个所述出现的情况下存储在复位之前的第一计数器的最后值，当所述最后一个值大于阈值时提供第一等级的第三周期信号，而当所述最后一个值为 小于阈值，并且基于第三信号的周期来确定调制周期。