公开(公告)号：US12284723B2

公开(公告)日：2025-04-22

申请号：US18670521

申请日：2024-05-21

Applicant: Apple Inc.

Inventor： Yuchul Kim ,  Christian W. Mucke ,  Haijing Hu ,  Dawei Zhang ,  Matthias Sauer ,  Johnson O. Sebeni

IPC: H04W8/22 ,  H04W8/00 ,  H04W88/06 ,  H04W88/08

Abstract: A wireless communication device (UE) may provide information pertaining to one or more operating capabilities of the UE to LTE and 5G-NR networks. The UE may transmit information to an LTE base station directly, and to a 5G-NR base station directly, or indirectly via the LTE base station. The information may include preferred values corresponding to any number of different operating parameters associated with wireless communications or wireless communication capabilities of the UE in both LTE and 5G-NR networks, informing and/or requesting the LTE and 5G-NR networks to make provisions based on the transmitted information for the wireless communications of the UE on those networks. The UE may thereby provide assistance information to LTE and 5G-NR networks in a multi-radio-access-technology dual-connectivity setting to request the respective networks to adjust certain operating capabilities of the UE in order to alleviate one or more operating issues that may be affecting the UE.

公开(公告)号：US12284054B2

公开(公告)日：2025-04-22

申请号：US18515468

申请日：2023-11-21

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L Rivera Espinoza

IPC: H04L12/40 ,  H04L12/413

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

公开(公告)号：US12245083B2

公开(公告)日：2025-03-04

申请号：US18451686

申请日：2023-08-17

Applicant: Apple Inc.

Inventor： Tarik Tabet ,  Awais M. Hussain ,  Lydi Smaini ,  Moustafa M. Elsayed ,  Syed Aon Mujtaba ,  Matthias Sauer ,  Ronald W. Dimpflmaier ,  Bernd W. Adler ,  Christian W. Mucke

IPC: H04L5/00 ,  H04W28/24 ,  H04W8/22 ,  H04W52/02

Abstract: A user equipment (UE) device may communicate according to a new device category satisfying specified QoS (quality of service) requirements while also satisfying specified link budget requirements, and/or additional optimization requirements. The UE device may communicate with a cellular base station according to a first mode of operation associated with the new device category, and may switch to communicating with the cellular base station according to a second mode of operation associated with a second (pre-existing) device category in response to the link budget requirements exceeding a specified value and the quality of service requirements not being sensitive. The UE device may also switch to communicating with the cellular base station according to a third mode of operation associated with a third (pre-existing) device type in response to the link budget requirement not exceeding the specified value, or the QoS requirements being sensitive and a downlink throughput requirement exceeding a specified throughput value.

公开(公告)号：US20240259480A1

公开(公告)日：2024-08-01

申请号：US18629489

申请日：2024-04-08

Applicant: Apple Inc.

Inventor： Biljana Badic ,  Christian Drewes ,  Ralph Hasholzner ,  Krisztian Kiss ,  Teck Yang Lee ,  Matthias Sauer ,  Mikhail Vilgelm ,  Babar Qaisrani ,  Vijay Venkataraman ,  Robert Zaus

IPC: H04L67/59 ,  H04L67/51 ,  H04W4/50

CPC classification number: H04L67/59 ,  H04L67/51 ,  H04W4/50

Abstract: A user equipment (UE) or other device performs service discovery of edge computing resources in a cellular network system and dynamic offloading of UE application tasks to discovered edge computing resources. As part of the discovery process, the device (e.g., the UE) may request edge server site capability information. When performing dynamic offloading, the UE may obtain (collect and/or receive) information regarding channel conditions, cellular network parameters or application requirements and dynamically determine whether a task of the application executing on the UE should be offloaded to an edge server or executed locally on the UE. In making decisions between offloaded or local execution, the UE may use a utility function that takes into account factors such as relative differences in application latency, energy consumption and offloading cost.

公开(公告)号：US12001364B2

公开(公告)日：2024-06-04

申请号：US18124332

申请日：2023-03-21

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Camille Chen ,  Vijay Kumar Ramamurthi ,  Alon Paycher ,  Matthias Sauer ,  Bernd W. Adler

IPC: G06F13/362 ,  G06F11/30 ,  G06F11/34 ,  G06F13/24 ,  G06F13/28 ,  G06F13/40

CPC classification number: G06F13/3625 ,  G06F11/3051 ,  G06F11/3409 ,  G06F13/24 ,  G06F13/28 ,  G06F13/4068 ,  G06F2213/0038 ,  G06F2213/40

Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.

公开(公告)号：US11991260B2

公开(公告)日：2024-05-21

申请号：US17439481

申请日：2020-12-17

Applicant: Apple Inc.

Inventor： Biljana Badic ,  Christian Drewes ,  Ralph Hasholzner ,  Krisztian Kiss ,  Teck Yang Lee ,  Matthias Sauer ,  Mikhail Vilgelm ,  Babar Qaisrani ,  Vijay Venkataraman ,  Robert Zaus

IPC: H04L67/59 ,  H04L67/51 ,  H04W4/50

CPC classification number: H04L67/59 ,  H04L67/51 ,  H04W4/50

Abstract: A user equipment (UE) or other device performs service discovery of edge computing resources in a cellular network system and dynamic offloading of UE application tasks to discovered edge computing resources. As part of the discovery process, the device (e.g., the UE) may request edge server site capability information. When performing dynamic offloading, the UE may obtain (collect and/or receive) information regarding channel conditions, cellular network parameters or application requirements and dynamically determine whether a task of the application executing on the UE should be offloaded to an edge server or executed locally on the UE. In making decisions between offloaded or local execution, the UE may use a utility function that takes into account factors such as relative differences in application latency, energy consumption and offloading cost.

公开(公告)号：US11978422B2

公开(公告)日：2024-05-07

申请号：US17818237

申请日：2022-08-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: G06F13/20 ,  G06F12/14 ,  G06F13/40 ,  G06F13/42 ,  G09G5/00

CPC classification number: G09G5/006 ,  G06F12/1458 ,  G06F13/4027 ,  G06F13/4221

Abstract: Embodiments relate to a billboard circuit that stores context information received from various component circuits in an electronic device. The context information indicates an operating status of the corresponding component circuit, system or shared resources. The stored context information may be retrieved by one or more component circuits when events (e.g., turning on of a component circuit) are detected. By using the billboard circuit, a component circuit may detect changes in the operating status of other components circuits and configure or update its operations even when the changes occurred while the component circuit was asleep or disabled. The billboard circuit may monitor updating of the context information by the component circuit and initiate notification to other components circuits when certain entries of the context information is updated.

公开(公告)号：US11863346B2

公开(公告)日：2024-01-02

申请号：US18103137

申请日：2023-01-30

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: H04L12/40 ,  H04L12/413

CPC classification number: H04L12/4135 ,  H04L12/40071 ,  H04L12/40084 ,  H04L2012/40215

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

公开(公告)号：US11595230B2

公开(公告)日：2023-02-28

申请号：US17854979

申请日：2022-06-30

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: H04L12/40 ,  H04L12/413

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

公开(公告)号：US11546843B2

公开(公告)日：2023-01-03

申请号：US17105269

申请日：2020-11-25

Applicant: Apple Inc.

Inventor： Matthias Sauer ,  Bernd W. Adler

IPC: H04W52/02

Abstract: In some embodiments, an apparatus includes first and second signal processing circuitry configured to perform signal processing operations and second signal processing circuitry configured to perform signal processing operations, wherein the second signal processing circuitry includes a smaller amount of processing resources than the first signal processing circuitry. In some embodiments, the apparatus includes one or more storage elements configured to store context information for the second signal processing circuitry and the one or more storage elements are accessible to the first signal processing circuitry. The apparatus may be configured to select one of the first and second signal processing circuitry based on the complexity of input problems, the amount of transmission resources assigned to the apparatus, etc. In some embodiments, intermediate results of from the second signal processing circuitry are used as inputs to an operation performed by the first signal processing circuitry.