Abstract:
A display device comprises a substrate having a layer of crystalline or polycrystalline semiconductor material disposed over the substrate, wherein the substrate has a strain point that is lower than a forming temperature of the layer. The crystalline or polycrystalline material is fabricated by a method that includes providing a self-assembled monolayer (SAM) over the substrate, depositing a layer of material over the SAM, and substantially crystallizing the layer.
Abstract:
An insulated glass unit is described and includes at least a first glass layer, a second glass layer and a third glass layer disposed therebetween. The third glass layer is separated from the first glass layer and the second glass layer by first and second sealed gap spaces. The third glass layer has a low CTE as compared to the CTE of the first and/or second glass layers. In some instances, the third glass layer has a CTE of less than 70 x 10-7/°C over a temperature range of 0-300°C.
Abstract:
Principles and embodiments of the present disclosure relate to unique asymmetric laminates and methods that produce the laminates that have improved damage tolerance, where the laminate includes a first strengthened glass substrate having a first central tension value bonded to a second strengthened glass substrate having a second central tension value by an interlayer, where the first central tension value is less than the second central tension value.
Abstract:
Disclosed herein are methods for making asymmetric laminate structures (100) and methods for reducing bow in asymmetric laminate structures, the methods comprising subjecting the laminate structures to at least one thermal cycle comprising cooling the laminate structures to a first temperature near or below room temperature and heating the laminate structures to a second temperature near or below the lamination temperature. Also disclosed herein are laminate structures made according to such methods.
Abstract:
Various embodiments are provided for an isolating fenestration assembly including a triple pane IGU configured with chambers between the panes and having a thicker or heavier first pane (outer pane) as compared to the second and third panes and/or an edge seal force not exceeding 1.2 N/m, when measured in accordance with prEN 16612.
Abstract:
Semiconductor-on-insulator (SOI) structures, including large area SOI structures, are provided which have one or more regions composed of a layer (15) of a substantially single-crystal semiconductor (e.g., doped silicon) attached to a support substrate (20) composed of an oxide glass or an oxide glass-ceramic. The oxide glass or oxide glass-ceramic is preferably transparent and preferably has a strain point of less than 1000oC, a resistivity at 250oC that is less than or equal to 1016 -cm, and contains positive ions (e.g., alkali or alkaline-earth ions) which can move within the glass or glass-ceramic in response to an electric field at elevated temperatures (e.g., 300-1000oC). The bond strength between the semiconductor layer (15) and the support substrate (20) is preferably at least 8 joules/meter2. The semiconductor layer (15) can include a hybrid region (16) in which the semiconductor material has reacted with oxygen ions originating from the glass or glass-ceramic. The support substrate (20) preferably includes a depletion region (23) which has a reduced concentration of the mobile positive ions. Figure 16