Abstract:
PROBLEM TO BE SOLVED: To provide a compiling method, a program and an information processing apparatus that are capable of lowering a CPU load and decreasing memory consumption by reducing guard codes which need to be embedded in a compiled code, when an indirect branch instruction is included in a machine language code to be compiled.SOLUTION: The compiling method implemented by an information processing apparatus includes the steps of: generating intermediate code from a trace, which is an instruction sequence described in a machine language; computing an offset between an address value, which is a base point of an indirect branch instruction, and a start address of a memory page, which includes a virtual address referred to by the information processing apparatus immediately after processing a first instruction; determining whether processing jumps to another memory page, using as an offset a value obtained by adding a displacement made by an indirect branch instruction, which is a second instruction subsequent to the first instruction; and optimizing the intermediate code by using the result of the determining step.
Abstract:
PROBLEM TO BE SOLVED: To provide a system for recovering from transient fault. SOLUTION: A leading thread and a trailing thread are executed in parallel. Assuming that no transient fault occurs in each section, a system is speculatively executed in the section, with the leading thread and the trailing thread preferably being assigned to two different cores. At this time, the leading thread and the trailing thread are simultaneously executed, performing a buffering operation on a thread local area without performing a write operation on a shared memory. When the execution results of the two threads match each other, the content buffered to the thread local area is committed and written to the shared memory. When the execution results of the two threads do not match each other, the leading thread and the trailing thread are rolled back to a preceding commit point and re-executed. Matching of the execution results of the two threads can be guaranteed, to prevent an error by transient fault. COPYRIGHT: (C)2011,JPO&INPIT