公开(公告)号：CA1292335C

公开(公告)日：1991-11-19

申请号：CA547745

申请日：1987-09-24

Applicant: IBM

Inventor： MOREL JEANNE E ,  RACKLEY DARWIN P ,  TRYNOSKY STEPHEN W ,  WALL WILLIAM A

IPC: G09G5/00 ,  G09G1/16 ,  G09G1/28 ,  G09G5/06 ,  G09G5/36 ,  G09G5/39 ,  G09G5/391

Abstract: RASTER SCAN DIGITAL DISPLAY SYSTEM An all points addressable raster scan graphics display system is operable in two modes. In the first mode, data is extracted from a refresh store, serialized, modified, and applied to a display device at a first frequency. In the second mode, data is extracted from the refresh store, serialized and partially modified at said first frequency, but it is then further modified and passed to the display device at an even sub harmonic, for example half, of the first frequency. The further modification includes concatenation of successive groups of display data bits. Accordingly, with the raster scan device operating at a constant scan velocity, the first mode provides a high picture element definition but relatively low color definition display, and the second mode provides a display with an even submultiple, for example half, the picture element definition but considerably greater color definition.

公开(公告)号：BR9204884A

公开(公告)日：1993-06-22

申请号：BR9204884

申请日：1992-12-07

Applicant: IBM

Inventor： DERWIN MICHAEL T ,  WALL WILLIAM A

IPC: G06F12/08 ,  G06F15/40

Abstract: A personal computer has a memory system including a write-through cache which is accessible by more than one device. A snoop mechanism includes logic that monitors bus master control signals to determine if a new memory write cycle has been started before a current snoop cycle has finished. If a new cycle has been started, then a corresponding snoop cycle occurs which overlaps the new memory cycle and is pipelined with the previous snoop cycle so that the snooping mechanism does not fall behind the memory write cycles.

公开(公告)号：CA2077048A1

公开(公告)日：1993-06-21

申请号：CA2077048

申请日：1992-08-27

Applicant: IBM

Inventor： DERWIN MICHAEL T ,  WALL WILLIAM A

IPC: G06F12/08

Abstract: A personal computer has a memory system including a write-through cache which is accessible by more than one device. A snoop mechanism includes logic that monitors bus master control signals to determine if a new memory write cycle has been started before a current snoop cycle has finished. If a new cycle has been started, then a corresponding snoop cycle occurs which overlaps the new memory cycle and is pipelined with the previous snoop cycle so that the snooping mechanism does not fall behind the memory write cycles.

公开(公告)号：BR8705443A

公开(公告)日：1988-05-24

申请号：BR8705443

申请日：1987-10-13

Applicant: IBM

Inventor： MOREL JEANNE E ,  RACKLEY DARWIN P ,  TRYNOSKY STEPHEN W ,  WALL WILLIAM A

IPC: G09G5/00 ,  G09G1/16 ,  G09G1/28 ,  G09G5/06 ,  G09G5/36 ,  G09G5/39 ,  G09G5/391 ,  G09G1/02

Abstract: An all points addressable raster scan graphics display system is operable in two modes. In the first mode, data is extracted from a refresh store, serialised, modified, and applied to a display device at a first frequency. In the second mode, data is extracted from the refresh store, serialised and partially modified at said first frequency, but it is then further modified and passed to the display device at an even sub harmonic, for example half, of the first frequency. The further modification includes concatenation of successive groups of display data bits. Accordingly, with the raster scan device operating at a constant scan velocity, the first mode provides a high picture element definition but relatively low colour definition display, and the second mode provides a display with an even submultiple, for example half, the picture element definition but considerably greater colour definition.