MUTUAL-CAPACITANCE DETECTION CIRCUIT AND MUTUAL-CAPACITANCE DETECTION ARRAY
    1.
    发明申请
    MUTUAL-CAPACITANCE DETECTION CIRCUIT AND MUTUAL-CAPACITANCE DETECTION ARRAY 审中-公开
    互电容检测电路和互电容检测阵列

    公开(公告)号:WO2014101861A1

    公开(公告)日:2014-07-03

    申请号:PCT/CN2013/090848

    申请日:2013-12-30

    CPC classification number: G06F3/044

    Abstract: A mutual-capacitance detection circuit and a mutual-capacitance detection array are provided. The mutual-capacitance detection circuit comprises: a first capacitor; a limited current transmitting module, connected with an input end of the first capacitor and configured to control the first capacitor to output a current signal having an alternate positive and negative amplitude; and a receiving module, connected with an output end of the first capacitor and configured to output a digital level pulse signal according to the amplitude of the current signal output from the first capacitor, in which a width of the digital level pulse signal is positively related with the amplitude of the current signal output from the first capacitor.

    Abstract translation: 提供互电容检测电路和互电容检测阵列。 互电容检测电路包括:第一电容器; 有限的电流传输模块,与第一电容器的输入端相连,并被配置为控制第一电容器以输出具有交替的正和负振幅的电流信号; 以及接收模块,与第一电容器的输出端连接,并且被配置为根据从第一电容器输出的电流信号的幅度输出数字电平脉冲信号,其中数字电平脉冲信号的宽度正相关 其中从第一电容器输出的电流信号的幅度。

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