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    METHOD OF PROVIDING A VIA HOLE AND ROUTING STRUCTURE
    1.
    发明申请
    METHOD OF PROVIDING A VIA HOLE AND ROUTING STRUCTURE 审中-公开
    提供通孔和路由结构的方法

    公开(公告)号：WO2013147694A1

    公开(公告)日：2013-10-03

    申请号：PCT/SE2013/050353

    申请日：2013-03-28

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： EBEFORS, Thorbjörn ,  PERTTU, Daniel

    IPC: H01L23/48 ,  H01L21/768

    CPC classification number: H01L21/76831 ,  H01L21/2885 ,  H01L21/76807 ,  H01L21/7684 ,  H01L21/76871 ,  H01L21/76879 ,  H01L21/76898 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The invention relates to a method of providing a via hole and routing structure. A a substrate wafer having recesses and blind holes provided in the surface of the wafer is provided. An insulating layer is provided in the recesses and the holes, and the holes and recesses are metallized. The oxide layer in the bottom of the holes is removed to provide a contact between the back side and the front side of the wafer. The invention also provides a semiconductor device, comprising a substrate having at least one metallized via (V) extending through the substrate and at least one metallized recess forming a routing (RDL) together with the via (V). There is an oxide layer (ISO) on the front side field and on the back side field. The metal in the recess (RDL) and the via (V) is flush with the oxide (ISO) on the field on at least the front side, whereby a flat front side is provided. The thickness of the semiconductor device is

    Abstract translation: 本发明涉及一种提供通孔和布线结构的方法。 提供了具有设置在晶片表面上的凹陷和盲孔的衬底晶片。 在凹部和孔中设置有绝缘层，并且孔和凹槽被金属化。 去除孔的底部中的氧化物层，以提供晶片的背侧和前侧之间的接触。 本发明还提供了一种半导体器件，其包括具有延伸穿过衬底的至少一个金属化通孔（V）的衬底和与通孔（V）一起形成路由（RDL）的至少一个金属化凹槽。 前侧场和背面场都有氧化层（ISO）。 凹槽（RDL）和通孔（V）中的金属至少在前侧与场上的氧化物（ISO）齐平，由此提供平坦的前侧。 半导体器件的厚度<300μm。

    CTE MATCHED INTERPOSER AND METHOD OF MAKING
    2.
    发明申请
    CTE MATCHED INTERPOSER AND METHOD OF MAKING 审中-公开
    CTE匹配插入器和制造方法

    公开(公告)号：WO2013154497A2

    公开(公告)日：2013-10-17

    申请号：PCT/SE2013/050408

    申请日：2013-04-15

    Applicant: SILEX MICROSYSTEMS AB

    Inventor： EBEFORS, Thorbjörn ,  PERTTU, Daniel

    IPC: H01L23/32 ,  H01L23/498 ,  H01L23/52 ,  H01L23/538

    CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/147 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: The inventive merit of the present interposer is that it is possible to taylor the coefficient of thermal expansion CTE of the interposer to match components to be attached thereto within very wide ranges. The invention relates to a emiconductor interposer, comprising a substrate (10) of a semiconductor material having a first side (FS) and an opposite second side (BS). There is at least one conductive wafer- through via (18, 28, 27) comprising metal (27). At least one recess (20)is provided in the first side of the substrate (10) and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure (20). The exposed surfaces of the metal filled via and the metal filled recess (18, 27) are essentially flush with the substrate surface on the first side of the substrate. The wafer-through via (18, 28, 27) comprises a narrow part (18) and a wider part (27), and there are provided contact elements on said routing structure (20) having an aspect ratio, height:diameter,

    Abstract translation: 本发明的插入器的创造性优点是可以在很宽的范围内使插入器的热膨胀系数CTE与匹配的元件相匹配。 本发明涉及一种半导体中介层，包括具有第一侧（FS）和相对的第二侧（BS）的半导体材料的衬底（10）。 存在至少一个包含金属（27）的导电晶片通孔（18,28,27）。 在衬底（10）的第一侧和衬底的半导体材料中提供至少一个凹部（20），该凹部填充有金属并且与提供布线结构（20）的晶片贯通通孔连接。 金属填充通孔和金属填充凹槽（18,27）的暴露表面基本上与衬底的第一侧上的衬底表面齐平。 晶片贯通过孔（18,28,27）包括窄部分（18）和较宽部分（27），并且在所述布线结构（20）上提供纵横比，高度：直径， ; 1：1，优选1：1至2：1。

    CTE MATCHED INTERPOSER AND METHOD OF MAKING
    8.
    发明公开
    CTE MATCHED INTERPOSER AND METHOD OF MAKING 审中-公开
    ZWISCHENSTÜCK具有产生调整的热膨胀系数和方法

    公开(公告)号：EP2837026A2

    公开(公告)日：2015-02-18

    申请号：EP13775666.4

    申请日：2013-04-15

    Applicant: Silex Microsystems AB

    Inventor： EBEFORS, Thorbjörn ,  PERTTU, Daniel

    IPC: H01L23/32 ,  H01L23/498 ,  H01L23/52 ,  H01L23/538

    CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/147 ,  H01L23/3142 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2924/1461 ,  H01L2924/00

    Abstract: The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side. There is at least one conductive wafer-through via including metal. At least one recess is provided in the first side of the substrate and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure. The exposed surfaces of the metal-filled via and metal-filled recess are essentially flush with the substrate surface on the first side of the substrate. The wafer-through via includes a narrow part and a wider part, and contact elements are provided on the routing structure having an aspect ratio, height:diameter,

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