Sigma-delta modulator
    91.
    发明公开
    Sigma-delta modulator 失效
    Σ-Δ调制器。

    公开(公告)号:EP0155061A2

    公开(公告)日:1985-09-18

    申请号:EP85200361.5

    申请日:1985-03-12

    CPC classification number: H03M3/346 H03M3/374 H03M3/43 H03M3/438

    Abstract: Switched capacitance feedback control circuit and sigma delta modulator, using same, for digitally encoding an analog inputsignal. The control circuit includes input means (IM3) able to sample and algebraically add an analog input signal [x(t)[ and an analog feedback signal (b), means (IM4) to integrate these added signals and to provide an analog output signal [w(t)], an analog-to-digital converter (ADC) providing a digital output signal (z) in response to the analog output signal, and a one-bit digital-to-analog converter (DAC) providing said feedback signal (b) in response to the output signal (z).

    Abstract translation: 开关电容反馈控制电路和Σ-Δ调制器,用于对模拟输入信号进行数字编码。 控制电路包括能够采样和代数地添加模拟输入信号[x(t)[和模拟反馈信号(b))的装置(IM3),以将这些相加信号进行积分并提供模拟输出信号 [w(t)],响应于模拟输出信号提供数字输出信号(z)的模数转换器(ADC)和提供所述反馈的一位数模转换器(DAC) 信号(b)响应于输出信号(z)。

    Electronic circuits and signal generator using them
    92.
    发明公开
    Electronic circuits and signal generator using them 失效
    Elektronische Schaltungen und Signalgenerator mit Verwendung dieser Schaltungen。

    公开(公告)号:EP0145038A2

    公开(公告)日:1985-06-19

    申请号:EP84201344.3

    申请日:1984-09-15

    CPC classification number: H04M15/00 H03K3/356104

    Abstract: The present invention relates to electronic circuits and signal generator using them. The signal generator is adapted to generate a signal with pulses having sloping edges and includes a generator circuit (BSG) which is adapted to give the signal (BS+) in the time intervals between the pulses such an amplitude with respect to a second signal (BS-) that this amplitude may be detected by a detector circuit (CO) and in response thereto may be limited by a limiting circuit (S4) to a reference value. The electronic circuits include a comparator circuit (CO) and a modulator circuit (MOD).

    Abstract translation: 本发明涉及使用它们的电子电路和信号发生器。 信号发生器适于产生具有倾斜边缘的脉冲的信号,并且包括发生器电路(BSG),发生器电路适于在脉冲之间的时间间隔中给出信号(BS +),例如相对于第二信号(BS - )可以由检测器电路(CO)检测到该幅度,并且响应于此可以将限制电路(S4)限制为参考值。 电子电路包括比较器电路(CO)和调制器电路(MOD)。

    Interactive video on demand network
    96.
    发明公开
    Interactive video on demand network 失效
    Interaktives NetzwerkfürVideo auf Anfrage。

    公开(公告)号:EP0653884A1

    公开(公告)日:1995-05-17

    申请号:EP93870216.4

    申请日:1993-11-17

    CPC classification number: H04N7/17318

    Abstract: The interactive video on demand network is intended for a plurality of user stations (US11, ..., USNM) and includes a video server (VS) producing a plurality of delayed instances of a video signal for transmission to the user stations, and a buffer means (IB1, ..., IBN) to an input of which a selected one of these instances is applied and at an output of which a version of the video signal as requested by a said user station is provided. The buffer means generates the requested version under control of control signals issued by the user stations and selects the instance based on that requested version. The buffer means (IB1, ... IBN) is able to transmit a load request signal to the video server (VS) which in response thereat applies at least part of the video signal to the input of the buffer means for storage therein, at a rate substantially higher than real time. In this way the buffer means always contains at least that part of the video signal needed to provide to the user station the version it has requested for and to provide functions such as pause, (fast) forward, (fast) rewind and resume.

    Abstract translation: 交互式视频点播网络旨在用于多个用户站(US11,...,USNM),并且包括产生用于传输到用户站的视频信号的多个延迟实例的视频服务器(VS),以及 缓冲器装置(IB1,...,IBN)到其中应用这些实例中的所选择的一个的输入,并且在其输出处提供由所述用户站请求的视频信号的版本。 缓冲器装置在由用户站发出的控制信号的控制下产生请求的版本,并根据所请求的版本选择实例。 缓冲器装置(IB1,... IBN)能够向视频服务器(VS)发送加载请求信号,视频服务器(VS)响应于该视频服务器(VS)向视频信号的至少一部分应用缓冲装置的输入以存储在其中, 一个比实时高的速度。 以这种方式,缓冲器装置总是至少包含视频信号的至少一部分,以向用户站提供其已经请求的版本,并提供诸如暂停,(快速)前进,(快速)快退和恢复等功能。

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