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    동기분리회로
    96.
    发明授权
    동기분리회로 失效
    同步分离电路

    公开(公告)号：KR1019920005017B1

    公开(公告)日：1992-06-22

    申请号：KR1019890012606

    申请日：1989-08-31

    Applicant: 삼성전자주식회사

    Inventor： 김창수

    IPC: H04N5/08

    Abstract: The transistors of the synchronizing separator circuit are operated within an active region so that the delay time due to storage time caused by the saturation is prevented. The circuit includes and a capacitor, an input stage (1) comprising resistors (Ro1,Ro2) and a capacitor to decide the synchronizing separation level so that transistors (Q1-Q5) are not satuarated, a comparator (2) comprising a differential amplifier and resistors, a transistor (Q2) for clamping base voltage of a transistor (Q3), and a transistor (Q5) for maintaining base voltage of a transistor (Q4).

    Abstract translation: 同步分离器电路的晶体管在有源区域内工作，从而防止由饱和引起的由于存储时间引起的延迟时间。 该电路包括电容器，包括电阻器（Ro1，Ro2）和电容器的输入级（1），用于决定同步分离电平以使晶体管（Q1-Q5）不饱和;比较器（2），包括差分放大器 和电阻器，用于钳位晶体管（Q3）的基极电压的晶体管（Q2）和用于维持晶体管（Q4）的基极电压的晶体管（Q5）。

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