-
公开(公告)号：JP2005129218A
公开(公告)日：2005-05-19
申请号：JP2004307123
申请日：2004-10-21
Inventor： LYSINGER MARK
Abstract: PROBLEM TO BE SOLVED: To provide a magnitude content addressable memory (MCAM). SOLUTION: Each cell of MCAM includes a data memory cell for storing data value and a magnitude comparator coupled to a first memory cell. The magnitude comparator receives a data value and a comparison value as inputs, and produces two magnitude signals as outputs. The first magnitude signal indicates whether the comparison value is greater than the data value and the second magnitude signal indicates whether the comparison value is less than the data value. The magnitude comparator also receives magnitude signals from the preceding MCAM cell. The previous magnitude signals are outputted as the first and second magnitude signals when the data value and the comparison value are equal. The MCAM enables data words of arbitrary length to be compared with comparison words. The MCAM cell may contain a second memory for storing a mask value. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：提供幅度内容可寻址存储器（MCAM）。 解决方案：MCAM的每个单元包括用于存储数据值的数据存储单元和耦合到第一存储单元的幅度比较器。 幅度比较器接收数据值和比较值作为输入，并产生两个幅度信号作为输出。 第一幅度信号指示比较值是否大于数据值，第二幅度信号指示比较值是否小于数据值。 幅度比较器还从前面的MCAM单元接收幅度信号。 当数据值和比较值相等时，先前的幅度信号作为第一和第二幅度信号被输出。 MCAM使任意长度的数据字与比较字进行比较。 MCAM单元可以包含用于存储掩码值的第二存储器。 版权所有（C）2005，JPO＆NCIPI
-
92.发明专利Fast cmos matched impedance type dc write current driver for preamplifier 审中-公开快速CMOS匹配阻抗型直流写入电流驱动器
公开(公告)号：JP2005027310A
公开(公告)日：2005-01-27
申请号：JP2004194385
申请日：2004-06-30
Inventor： TWARI VINEET , ALINI ROBERTO
IPC: H03F3/345 , G11B5/00 , G11B5/012 , H03K17/0814 , H03K17/10
CPC classification number: H03K17/08142 , G11B5/012 , G11B2005/0013 , H03K17/102
Abstract: PROBLEM TO BE SOLVED: To provide a current driver in which a limitation on a speed, safe operating area problem and a wasted current during overshoot problem are improved.
SOLUTION: A driver circuit includes a CMOS stage and switch functionalities for performing certain tasks. One task is to selectively block an exposure of the CMOS stage to a reference voltage. Another task is to selectively protect the CMOS stage during a transient operation. Yet another task is to block a leakage current flowing from the CMOS stage to a ground.
COPYRIGHT: (C)2005,JPO&NCIPIAbstract translation: 要解决的问题：提供一种电流驱动器，其中提高了在过冲问题中对速度，安全操作区域问题和浪费的电流的限制。
解决方案：驱动器电路包括CMOS级和用于执行某些任务的开关功能。 一个任务是选择性地将CMOS级的曝光阻挡到参考电压。 另一个任务是在瞬态操作期间选择性地保护CMOS级。 另一个任务是阻止从CMOS级流到地的漏电流。 版权所有（C）2005，JPO＆NCIPI
-
公开(公告)号：JP2005004765A
公开(公告)日：2005-01-06
申请号：JP2004171135
申请日：2004-06-09
Inventor： LEAMING TAYLOR J
IPC: G01R31/28 , G01R31/3185 , G06F11/22 , G06K7/00 , G06K19/07
CPC classification number: G01R31/318555 , G01R31/3025 , G01R31/31719 , G06F11/267 , G06F11/27 , G06K7/0013 , G06K7/0095 , G06K7/10465 , G06K19/07 , G06K19/07733
Abstract: PROBLEM TO BE SOLVED: To provide an integrated circuit for a smart card having improved test performance and to provide a related method. SOLUTION: According to the present invention, the integrated circuit for a smart card includes a transceiver which communicates with a host device and a joint test action group (JTAG) test controller for carrying out at least one test operation. Further, the integrated circuit can include a processor which allows the JTAG test controller to start the at least one test operation based on the reception of at least one test request from the host device via the transceiver. More specifically, the processor can convert the at least one test request into JTAG data for the JTAG test controller. Namely, the integrated circuit enables communications between the host device and the JTAG controller via a system bus without the need for a dedicated JTAG test access port (TAP) typically required for accessing the JTAG controller. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：提供具有改进的测试性能的智能卡的集成电路并提供相关方法。 解决方案：根据本发明，用于智能卡的集成电路包括与主机设备和用于执行至少一个测试操作的联合测试动作组（JTAG）测试控制器通信的收发器。 此外，集成电路可以包括处理器，其允许JTAG测试控制器基于经由收发器从主机设备接收至少一个测试请求来开始至少一个测试操作。 更具体地，处理器可以将至少一个测试请求转换为用于JTAG测试控制器的JTAG数据。 也就是说，集成电路通过系统总线实现主机设备和JTAG控制器之间的通信，而不需要通常需要访问JTAG控制器的专用JTAG测试访问端口（TAP）。 版权所有（C）2005，JPO＆NCIPI
-
公开(公告)号：JP2005004762A
公开(公告)日：2005-01-06
申请号：JP2004170423
申请日：2004-06-08
Inventor： LEAMING TAYLOR J
CPC classification number: G06F11/263 , G06K7/0013 , G06K7/0095 , G06K7/10465 , G06K19/07
Abstract: PROBLEM TO BE SOLVED: To provide an improved method of developing and testing smart cards. SOLUTION: A system relating tests design of a universal serial bus (USB) smart card device and contains a bus analyzer for running a test case to generate a USB bus traffic. A processor is connected to the bus analyzer for receiving data of the USB traffic and converting them into data format chosen usable over a different smart card developing environment. COPYRIGHT: (C)2005,JPO&NCIPI
Abstract translation: 要解决的问题：提供开发和测试智能卡的改进方法。 解决方案：一种与通用串行总线（USB）智能卡设备的测试设计相关的系统，并且包含用于运行测试用例的总线分析器以产生USB总线流量。 处理器连接到总线分析器，用于接收USB流量的数据，并将其转换为可选择通过不同的智能卡开发环境使用的数据格式。 版权所有（C）2005，JPO＆NCIPI
-
公开(公告)号：JP2004297071A
公开(公告)日：2004-10-21
申请号：JP2004093393
申请日：2004-03-26
Inventor： ANTHONY M CHU , HARRY MICHAEL SIEGEL
CPC classification number: H01L24/48 , G06K9/0002 , H01L21/565 , H01L23/3107 , H01L2224/0401 , H01L2224/05599 , H01L2224/16145 , H01L2224/48227 , H01L2224/48465 , H01L2224/4848 , H01L2224/85051 , H01L2224/85399 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01027 , H01L2924/01078 , H01L2924/014 , H01L2924/14 , H01L2924/181 , H01L2924/1815 , H01L2924/19041 , H01L2924/19043 , H01L2924/19104 , H01L2224/45099 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/4554
Abstract: PROBLEM TO BE SOLVED: To provide a technology for improving a packaging of an integrated circuit including the integrated circuit die surface exposed partially at least. SOLUTION: The integrated circuit (IC) device comprising: (1) the integrated circuit (IC) die having a first surface, a second surface opposite the first surface, and sidewalls extending between the first surface and the second surface; (2) the integrated circuit (IC) package for supporting the IC die, wherein the IC package is attached to at least one of the sidewalls of the IC die such that at least a portion of the IC die first surface and at least a portion of the IC die second surface are exposed; and (3) at least one auxiliary component attached to at least one of the exposed portion of the IC die first surface and the exposed portion of the IC die second surface. COPYRIGHT: (C)2005,JPO&NCIPI
-
Patent Agency Ranking
公开(公告)号：JP2004229300A
公开(公告)日：2004-08-12
申请号：JP2004013875
申请日：2004-01-22
Inventor： POSAT BARIS , OZANOGLU KEMAL , VENCA ALESANDRO
CPC classification number: G11B20/10009 , G11B5/02 , G11B5/09 , G11B2005/0013 , G11B2005/0029 , H03F1/42 , H03F3/45278 , H03F2200/36 , H03F2200/432 , H03F2203/45318 , H03F2203/45544 , H03F2203/45594 , H03F2203/45648
Abstract: PROBLEM TO BE SOLVED: To provide a preamplifier circuit having necessary operating characteristics required for the effective operation of a disk drive employing a vertical recording technology.
SOLUTION: The amplifier for amplifying an electrical signal such as an electrical signal generated by a read head of the disk drive and a method are provided. The circuit includes a pair of cross-linked differential amplifier circuits. Each differential amplifier circuit is asymmetrical and includes two input transistors of different transistor types. For example, a bipolar transistor can be applied to a first one of the two input transistors of the differential amplifier circuits and a field effect transistor can be applied to a second one of the two input transistors. A relatively wide operating frequency range is obtained by using an asymmetric differential amplifier circuit.
COPYRIGHT: (C)2004,JPO&NCIPI-
97.发明专利
公开(公告)号：JP2004194321A
公开(公告)日：2004-07-08
申请号：JP2003408995
申请日：2003-12-08
Inventor： RAJGOPAL SURESH , HUANG LUN BIN , RICHARDSON NICHOLAS
CPC classification number: G06F17/30985
Abstract: PROBLEM TO BE SOLVED: To provide an improved multi-bit trie network search engine. SOLUTION: A series of hardware pipeline units each processing a stride during prefix search operations on a multi-bit trie includes, within at least one pipeline unit other than the last pipeline unit, a mechanism for retiring search results from the respective pipeline unit rather than passing the search results through the remaining pipeline units. Early retirement may be triggered by either the absence of subsequent strides to be processed or completion of the search ( a miss or end node match ), together with an absence of active search operations in subsequent pipeline units. Worst-case and/or average latency for prefix search operations is reduced. COPYRIGHT: (C)2004,JPO&NCIPI
-
公开(公告)号：JP2004153834A
公开(公告)日：2004-05-27
申请号：JP2003371563
申请日：2003-10-31
Inventor： GONTOWSKI WALTER S JR
CPC classification number: H03F3/3071 , G11B5/5526 , G11B5/59605 , G11B7/08505
Abstract: PROBLEM TO BE SOLVED: To provide an amplifier which improves a clamp operation and saturation detection and is used for a disk drive or the like. SOLUTION: The amplifier has an output stage including first and second output transistors and a bias stage for generating first and second bias voltages in control terminals of the first and second output transistors based upon a supplied voltage and an input signal of the amplifier. Besides, the amplifier includes a clamp stage equipped with first and second clamp transistors for respectively clamping outputs of the first and second output transistors to higher and lower clamp voltages. The amplifier further includes a clamp stage connected to said clamp stage for supplying a saturation signal to at least one for clamping the output of the first output transistor to the higher clamp voltage (a) and clamping the output of the second output transistor to the lower clamp voltage (b). COPYRIGHT: (C)2004,JPO
-
公开(公告)号：JP2004031912A
公开(公告)日：2004-01-29
申请号：JP2003060193
申请日：2003-03-06
Inventor： DANIEL A THOMAS , HARRY MICHAEL SIEGEL , DO BENTO VIEIRA ANTONIO A , ANTHONY M CHU
IPC: H01L23/52 , H01L21/3205 , H01L21/60 , H01L23/12 , H01L23/31 , H01L23/485
CPC classification number: H01L24/13 , H01L23/3114 , H01L24/11 , H01L2224/0401 , H01L2224/05546 , H01L2224/05624 , H01L2224/05684 , H01L2224/13099 , H01L2224/131 , H01L2924/0001 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01075 , H01L2924/014 , H01L2924/14 , Y10T29/49144 , Y10T29/49146 , Y10T29/49155 , H01L2924/00014
Abstract: PROBLEM TO BE SOLVED: To provide an improved system and method for applying a re-distributed metal layer in an integrated circuit chip. SOLUTION: The re-distributed metal layer 260 is formed of the last metal layer in an integrated circuit in the manufacturing period of the integrated circuit before final passivation is applied. This last metal layer provides a part for a solder bump pad to be used for flip chip interconnection. The re-distributed metal layer may be stuck on (1) a flat layer stuck on the second metal layer from the last through an aperture in a dielectric layer, or (2) an array configured of a via connected to the second metal layer from the last. COPYRIGHT: (C)2004,JPO
-
公开(公告)号：JP2004025426A
公开(公告)日：2004-01-29
申请号：JP2002370549
申请日：2002-12-20
Inventor： SANTORUVO GAETANO , LO PRIORE STEFANO
IPC: B41J2/05 , B01J19/00 , B01L3/00 , B01L7/00 , B41J2/14 , B81B1/00 , B81B3/00 , H01L23/34 , H01L27/12 , H01L29/06 , H01L29/78 , H05B3/28
CPC classification number: H05B3/28 , B01J19/0093 , B01J2219/00783 , B01J2219/00873 , B01L3/5027 , B01L7/52 , B41J2/14129 , B41J2202/13 , H01L23/345 , H01L27/1203 , H01L29/0657 , H01L29/78 , H01L2924/0002 , H01L2924/00
Abstract: PROBLEM TO BE SOLVED: To provide a small-sized improved heater using a transistor. SOLUTION: An integrated heater formed as a field effect transistor in a semiconductor substrate 12, with the transistor having source region 14 and a drain region 16 with a channel region extending therebetween to conduct current. The channel region has a resistance R DS when conducting current to generate heat above a selected threshold. A dielectric layer 24 is disposed on the channel region 20 and a gate electrode 26 is disposed on the dielectric layer to control the current of the channel region 20. A thermally insulating barrier may be formed in the semiconductor material extending about the transistor. The object 32 to be heated is positioned to receive the heat generated by the resistance R DS of the channel region 20, and the object 32 to be heated may be a fluid chamber. COPYRIGHT: (C)2004,JPO
-
-
-
-
-
-
-
-
-
Search Results
4082
records
(took 0.065 seconds)
