公开(公告)号：EP1102270A1

公开(公告)日：2001-05-23

申请号：EP00931638.1

申请日：2000-06-01

Applicant: Matsushita Electronics Corporation

Inventor： YAMAMOTO, Masaya ,  OKADA, Tomoyuki ,  UESAKA, Yasushi ,  TSUGA, Kazuhiro

IPC: G11B27/00 ,  G11B27/10 ,  G11B20/12 ,  G11B20/10

CPC classification number: G11B27/329 ,  G11B20/10527 ,  G11B27/034 ,  G11B27/10 ,  G11B27/105 ,  G11B27/11 ,  G11B27/3027 ,  G11B27/34 ,  G11B2020/00079 ,  G11B2020/10592 ,  G11B2220/216 ,  G11B2220/2562 ,  G11B2220/2575

Abstract: The present invention provides an optical disc, as an information recording medium for storing map information for mapping time stamp information about an audio object recorded on the optical disc in a constant bit rate format or a variable bit rate format and a recording position on the disc, which can reduce a size of the map information. The map information stored in the optical disc records a playback duration for only first and last units of a plurality of audio object units (AOBU) comprised in an audio object (AOB) for each AOB when audio data in the variable bit rate mode is to be recorded, and records the sizes and playback duration of the AOBU for the last one of AOBUs comprised in AOB and for any one of the AOBUs except for the last AOBU.

Abstract translation: 本发明提供了在光盘上，作为信息记录介质，用于在一个恒定比特率格式或可变位速率的格式和在盘上的记录位置记录在光盘上的音频对象存储地图信息映射时间戳信息有关 ，它可以减少大小的地图信息。 存储在光盘中的地图信息记录的再现持续时间仅在到音频对象（AOB）包含为每一AOB当在可变比特率模式的音频数据是音频目标单元（AOBU）的多个第一和最后一个单元 进行记录，并记录AOBU的尺寸和回放持续时间的AOBU由在AOB的最后一个和用于除负载AOBU的AOBU中的任何一个。

公开(公告)号：EP1094526A2

公开(公告)日：2001-04-25

申请号：EP00309083.4

申请日：2000-10-16

Applicant: Matsushita Electronics Corporation

Inventor： Shimada, Yasuhiro ,  Hayashi, Shinichiro ,  Uchiyama, Kiyoshi ,  Tanaka, Keisuke

IPC: H01L29/78

CPC classification number: H01L29/6684 ,  H01L21/28291 ,  H01L29/772 ,  H01L29/78391

Abstract: A tunneling transistor is provided as an effective means for miniaturization of a semiconductor integrated circuit having nonvolatile memory. An insulating layer is disposed on a silicon substrate. A source and a drain are disposed on the insulating layer, with an insulator of a few nanometers in thickness that provides a tunnel barrier being interposed between the source and the drain. A ferroelectric layer that exhibits spontaneous polarization is disposed directly above a region of the source that is adjacent to the insulator. With this construction, when the ferroelectric layer is polarized in a predetermined direction, at least a portion of the region of the source adjacent to the insulator forms a depletion region, with it being possible to vary the amount of current tunneling through the insulator depending on whether the ferroelectric layer is polarized or not.

公开(公告)号：EP1032037A3

公开(公告)日：2001-04-25

申请号：EP99121878.5

申请日：1999-11-04

Applicant: Matsushita Electronics Corporation

Inventor： Minamio, Masanori ,  Takemura, Kunikazu ,  Yamada, Yuichiro ,  Ito, Fumito ,  Matsuo, Takahiro

IPC: H01L23/495 ,  H01L21/56

CPC classification number: H01L24/32 ,  H01L21/565 ,  H01L23/3107 ,  H01L23/49503 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29007 ,  H01L2224/32014 ,  H01L2224/32055 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00014 ,  H01L2924/3512 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A resin-molded semiconductor device includes: signal leads; a die pad with a central portion elevated above a peripheral portion thereof; support leads, each including a raised portion higher in level than the other portions; and DB paste for use in die bonding. All of these members are encapsulated within a resin encapsulant. The lower part of each of these signal leads protrudes downward out of the resin encapsulant and functions as an external electrode. Each of the support leads is provided with two bent portions to cushion the deforming force. By forming a half-blanked portion in the die pad, the central portion is elevated above the peripheral portion, thus preventing the semiconductor chip from being hampered by the support leads. Accordingly, the size of the semiconductor chip mounted can be selected from a broader range and the humidity resistance of the device can also be improved.

Abstract translation: 包括所述垫的树脂封装型半导体装置，芯片焊盘的中央部被上述其周边部分包围的中心部分升高; 安装在管芯焊盘的中央部的半导体芯片; 的载体上的多个引线，用于支撑所述管芯焊盘; 信号引线朝向管芯焊盘延伸的多元性; 的用于电连接半导体芯片的信号引线的金属细线一个多元化; 和用于封装所述半导体芯片，芯片焊盘，支撑引线，所述金属细线和信号的树脂封装的引线检查没有的每个所述信号引线的下部和外侧面被暴露到外部端子，做了下部 的信号引线向下突出，在树脂包封剂的worin部分介于管芯焊盘的周边部的上表面和半导体芯片的背面之间，并且worin一个槽在管芯焊盘的上表面上设置 周边部分，以便围绕中心部分。

公开(公告)号：EP0856989A3

公开(公告)日：2001-04-18

申请号：EP98101842.7

申请日：1998-02-03

Applicant: MATSUSHITA ELECTRONICS CORPORATION

Inventor： Kuroda, Takao ,  Masuyama, Masayuki

IPC: H04N3/15 ,  G01D3/036

CPC classification number: H04N5/3745 ,  H04N5/3651 ,  H04N5/3658 ,  H04N5/378

Abstract: This invention discloses a physical quantity distribution sensor comprising a plurality of unit cells. Each such unit cell includes an information storage region responsive to a physical stimulus and capable of a transition from a first electrical potential state to a second electrical potential state according to the physical stimulus, a driving element for providing at an output portion thereof an electrical potential according to the electrical potential state of the information storage region, and a switching element by means of which the unit cell is selected. The physical quantity distribution sensor further includes an output adjustment section capable of adjusting the first electrical potential state of the information storage region in order that the output of the selected driving element may substantially equal a reference electrical potential at the time when the switching element is in the conductive state.

Abstract translation: 本发明盘松物理量分布传感器，其包括单元电池的复数。 每个搜索单位单元包括在信息存储区域响应于物理刺激，并且能够从第一电势状态到第二电势状态向物理刺激物，用于以输出它们的部分提供到电势的驱动元件的过渡雅丁 gemäß到信息存储区域的电势状态，和开关元件，借助于该被选择的单元电池。 物理量分布传感器还包括在输出调整部能够调整，以便在信息存储区域的所述第一电势状态的，所选择的驱动元件的DASS管芯输出可基本上在时间等于一个参考电势当开关元件处于 导电的状态。

公开(公告)号：EP1091422A2

公开(公告)日：2001-04-11

申请号：EP00121878.3

申请日：2000-10-06

Applicant: Matsushita Electronics Corporation

Inventor： Nakamura, Shinji ,  Ishida, Masahiro ,  Orita, Kenji ,  Imafuji, Osamu ,  Yuri, Masaaki

IPC: H01L33/00 ,  H01L21/20

CPC classification number: C30B25/183 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/02516 ,  H01L21/0254 ,  H01L33/025 ,  H01L33/20 ,  H01L33/32 ,  H01S5/0207 ,  H01S5/3201 ,  H01S5/3202 ,  H01S5/3203 ,  H01S5/32341

Abstract: Disclosed is a semiconductor device which comprises a substrate in which surface is formed a depression having a closed figure when viewed from the substrate normal and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least an inside face of the depression.

Abstract translation: 公开了一种半导体器件，其包括其中表面形成有凹陷的基板或从基板法线观察时具有闭合图形的突起和通过从至少内部的晶体生长形成在基板的表面上的半导体层 凹凸面或投影面的外表面。

公开(公告)号：EP1090427A1

公开(公告)日：2001-04-11

申请号：EP00919507.4

申请日：2000-03-21

Applicant: SYMETRIX CORPORATION ,  Matsushita Electronics Corporation

Inventor： ARITA, Koji ,  PAZ DE ARAUJO, Carlos, A.

IPC: H01L29/78 ,  H01L29/51

CPC classification number: H01L29/516 ,  H01L21/28291 ,  H01L28/56 ,  H01L29/78391

Abstract: A nonvolatile nondestructible read-out ferroelectric FET memory (10, 40, 60, 80, 100, 110, 120, 130, 160) comprising a semiconductor substrate (19), a ferroelectric functional gradient material ('FGM') thin film (26, 50, 70, 90, 20, 140, 170), and a gate electrode (30). In one basic embodiment, the ferroelectric FGM thin film (26, 50, 70, 90, 20, 140, 170) contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film (26, 50, 70, 90, 20, 140, 170) is a functional gradient ferroelectric ('FGF'), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is related to an enlarged memorywindow in ferroelectric FET memories. FGM thin films (26, 50, 70, 90, 20, 140, 170) are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.

公开(公告)号：EP0920050A3

公开(公告)日：2001-04-11

申请号：EP98122134.4

申请日：1998-11-25

Applicant: Matsushita Electronics Corporation

Inventor： Nakatani, Toshifumi ,  Kurata, Takatsugu ,  Imai, Kanji ,  Sekiguchi, Tomohiro ,  Hamada, Kiyoshi

IPC: H01J31/12 ,  H01J29/46

CPC classification number: H01J29/467 ,  H01J31/126

Abstract: An image display apparatus comprises, in a vacuum container formed by a rear container (10) and a front glass container (14), a fluorescent layer (15), an electron emission source (11c), electrodes (11,12,13) to control electron beams emitted from the electron emission source (11c). The electrodes (11,12,13) are formed by stringing wires (11b,12b,13b,13c) on frames (11a,12a,13a) made of a resilient material, and the frames (11a,12a,13a) on which the wires (11b,12b,13b,13c) are strung have respectively pairs of opposing sides that are flat plates formed on the same surface. The electrodes that are free from waviness or warping have high flatness, control the focusing and deflection of the electron beams appropriately, and prevent deviation of the landing positions of the electron beams and errors including error irradiation. Such an image display apparatus can provide excellent images and high resolution.

Abstract translation: 本发明提供一种图像显示装置，其在由后部容器（10）和前部玻璃容器（14）形成的真空容器内具有荧光体层（15），电子发射源（11c），电极（11,12,13） 以控制从电子发射源（11c）发射的电子束。 通过在由弹性材料制成的框架（11a，12a，13a）上将导线（11b，12b，13b，13c）和其上设置有框架（11a，12a，13a）的框架 线（11b，12b，13b，13c）串联地具有分别形成在同一表面上的平板对的相对侧。 没有起伏或翘曲的电极具有高平坦度，适当地控制电子束的聚焦和偏转，并且防止电子束的着落位置的偏差和包括误差照射的误差。 这样的图像显示装置可以提供优异的图像和高分辨率。

公开(公告)号：EP1087387A1

公开(公告)日：2001-03-28

申请号：EP00915477.4

申请日：2000-04-10

Applicant: Matsushita Electronics Corporation

Inventor： Kage, Shingo ,  Toyama, Yasunari

IPC: G11B17/04 ,  G11B17/028

CPC classification number: G11B17/051 ,  G11B17/0286 ,  G11B17/0288 ,  G11B17/0404 ,  G11B17/0515

Abstract: The disc player according to the present invention is provided with a disc selecting lever 8 which is oscillatably journaled on both ends along the direction perpendicular to a disc transportation direction X. Furthermore, on both ends of the disc selecting lever 8 are provided projecting portions 8a, 8b projecting toward the disc side, respectively. When a large-diameter disc is transported, both of the projecting portions 8a, 8b abut on the disc to push down the disc, while on the other hand, when a small-diameter disc is transported, both or at least one of the projecting portions 8a, 8b does not abut on the disc. In addition, a large-diameter latch member 5 for receiving and latching the large-diameter disc having reached a terminal end of transportation after being pushed down by the projecting portions 8a, 8b, and a small-diameter latch member 6 for receiving and latching the small-diameter disc having reached the terminal end of transportation are provided. In this way, decrease in whole thickness is achieved.

Abstract translation: 根据本发明的盘片播放器设有一个盘片选择杆8，该盘片选择杆8沿垂直于盘片传送方向X的方向可摆动地支撑在两端。此外，在盘片选择杆8的两端设有突出部分8a ，8b分别朝向盘侧突出。 当输送大直径盘时，突出部分8a，8b都抵靠在盘上以推下盘，而另一方面，当输送小直径盘时，突出部8a，8b中的两个或至少一个突出部 部分8a，8b不抵靠在盘上。 另外，大直径锁闩构件5用于接收和锁定已经通过突出部分8a，8b下推后到达运输的终端的大直径盘片，以及用于接收和锁定的小直径锁定构件6 提供了到达运输终点的小直径盘。 以这种方式，实现整体厚度的减小。

公开(公告)号：EP1083607A2

公开(公告)日：2001-03-14

申请号：EP00307434.1

申请日：2000-08-30

Applicant: Matsushita Electronics Corporation

Inventor： Uemoto, Yasuhiro ,  Yamashita, Katsushige ,  Miura, Takashi

IPC: H01L29/78 ,  H01L29/861 ,  H01L29/739 ,  H01L29/74 ,  H01L29/06

CPC classification number: H01L29/7812 ,  H01L21/76286 ,  H01L29/0615 ,  H01L29/063 ,  H01L29/7394 ,  H01L29/7436 ,  H01L29/78 ,  H01L29/7824 ,  H01L29/7835 ,  H01L29/78606 ,  H01L29/78624 ,  H01L29/78654 ,  H01L29/8611

Abstract: In an SOI (Silicon-On-Insulator) semiconductor device (200), a first semiconductor layer (3) overlies a semiconductor substrate (1) so as to sandwich an insulating layer (2), and second (9) and third (11) semiconductor layers are formed on the surface of the first semiconductor layer (3). At the interface between the first semiconductor layer (3) and the insulating layer (2), a fourth semiconductor layer (12) with a conductivity type opposite that of the first semiconductor layer (3) is formed. The fourth semiconductor layer (12) includes an impurity density larger than 3x10 12 /cm 2 so as to be not completely depleted even when a reverse bias voltage is applied between the second (9) and third (11) semiconductor layers. The device may be a field-effect transistor such as a LDMOS, a LIGBT, a LDD transistor, or it may be a pu-junction diode or a lateral thyristor.

Abstract translation: 在SOI（绝缘体上硅）半导体器件（200）中，第一半导体层（3）覆盖半导体衬底（1）以夹住绝缘层（2），第二（9）和第三（11 ）半导体层形成在第一半导体层（3）的表面上。 在第一半导体层（3）和绝缘层（2）之间的界面处形成具有与第一半导体层（3）相反的导电类型的第四半导体层（12）。 第四半导体层（12）包括大于3×10 12 / cm 2的杂质密度，以便即使在第二（9）和第三（11）半导体层之间施加反向偏置电压也不会完全耗尽 。 器件可以是诸如LDMOS，LIGBT，LDD晶体管的场效应晶体管，或者它可以是pu结二极管或侧向晶闸管。

公开(公告)号：EP1083602A2

公开(公告)日：2001-03-14

申请号：EP00119722.7

申请日：2000-09-09

Applicant: Matsushita Electronics Corporation

Inventor： Nakanishi, Hideyuki ,  Ijima, Shin'ichi ,  Yoshikawa, Akio ,  Hirano, Ryuma

IPC: H01L23/495 ,  H01L31/02 ,  H01L33/00

CPC classification number: H01L23/49568 ,  H01L23/49503 ,  H01L23/49541 ,  H01L23/49548 ,  H01L31/0203 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A lead frame includes a die pad including a die pad main portion having a large thickness and a die pad peripheral portion having an intermediate thickness smaller than that of the die pad main portion, provided on at least one side of the die pad main portion, at least one support lead connected to the die pad, and at least two first inner leads having a small thickness smaller than that of the die pad peripheral portion, arranged such that end portions thereof are opposed to the die pad peripheral portion. The thick die pad provides good heat release properties, and reducing the thickness of the leads allows fine pitched leads to be produced. Such a lead frame can be manufactured easily by press stamping after belt-shaped regions having different thickness are formed by rolling.

Abstract translation: 的引线框架包括：一个所述垫包含具有大厚度和具有中间厚度比所述芯片安装区本体部分的直径小一的芯片安装区周边部分，设置在所述芯片安装区本体部分的至少一侧上的衬垫主体部分， 至少一个支撑引线连接到所述管芯焊盘，且厚度小比管芯焊盘周边部分的小的至少两个第1内引线，布置搜索做其端部相对于所述垫周边部分。 厚，垫可提供良好的散热特性，并减少引线的厚度允许产生的细间距的引线。 这样的引线框架可以通过冲压具有不同厚度的带状区域后容易冲压来制造通过轧制形成。