METHOD OF OPERATING A STORAGE DEVICE
    101.
    发明公开

    公开(公告)号:US20240235555A9

    公开(公告)日:2024-07-11

    申请号:US18402958

    申请日:2024-01-03

    CPC classification number: H03K19/1737 H03K19/1735

    Abstract: A device includes a first AND logic gate comprising a first input, a second input, and an output, a second AND logic gate comprising a first input, a second input, and an output, and a first OR logic gate comprising a first input coupled to the output of the first AND logic gate and a second input coupled to the output of the second AND logic gate. A first selection circuit has first and second data inputs, a first control input coupled to the first input of the first AND logic gate and a second control input coupled to the first input of the second AND logic gate. A first D latch includes a data input coupled to an output of the first selection circuit and an activation input coupled to an output of the first OR logic gate and a second D latch includes a data input coupled to the output of the first selection circuit and an activation input coupled to the output of the first OR logic gate.

    METHOD OF DETERMINING A STATE OF A DISPLAY
    104.
    发明公开

    公开(公告)号:US20240203334A1

    公开(公告)日:2024-06-20

    申请号:US18537252

    申请日:2023-12-12

    Inventor: Salim BOUCHENE

    Abstract: A display includes a display panel and a circuit. The circuit controls the display panel according to at least one control mode such as a pulse width modulation control mode. A method for determining a state of the display includes: acquiring samples from a channel of an ambient light sensor disposed below the display panel; supplying the samples to a processing circuit; detecting, by the processing circuit and based on said samples, whether the display panel is controlled in pulse width modulation; and following detecting the pulse width modulation control mode, calculating by the processing circuit a duty cycle from the samples.

    INTEGRATED CIRCUIT CONFIGURED TO EXECUTE AN ARTIFICIAL NEURAL NETWORK

    公开(公告)号:US20240143987A1

    公开(公告)日:2024-05-02

    申请号:US18382638

    申请日:2023-10-23

    CPC classification number: G06N3/063

    Abstract: An integrated circuit includes a computer unit configured to execute the neural network. Parameters of the neural network are stored in a first memory. Data supplied at the input of the neural network or generated by the neural network are stored in a second memory. A first barrel shifter circuit transmits data from the second memory to the computer unit. A second barrel shifter circuit delivers data generated during the execution of the neural network by the computer unit to the second memory. A control unit is configured to control the computer unit, the first and second barrel shifter circuits, and accesses to the first memory and to the second memory.

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