103.
    发明专利
    未知

    公开(公告)号:AT156953T

    公开(公告)日:1997-08-15

    申请号:AT90305868

    申请日:1990-05-30

    Applicant: MOTOROLA INC

    Abstract: There is provided a scheme for bit error rate detection. It is characterised by: detecting the bit value present in a received multi-level signal (102), more narrowly detecting the bit value present in that received multi-level signal (104), comparing the results of narrow detection with the results detected otherwise to identify errors in detection (203, 206, 207 and 209), and accumulating detected symbol errors over unit time. Bit error rate detection can be used for antenna selection-selecting one of a plurality of diversity antennas when the error rate exceeds (213) a certain error threshold.

    ENCRYPTION APPARATUS
    104.
    发明专利

    公开(公告)号:CA2055502C

    公开(公告)日:1995-10-03

    申请号:CA2055502

    申请日:1991-02-25

    Applicant: MOTOROLA INC

    Abstract: An encryption circuit that operates with substantially zero delay. Using programmable keys and polynomials, the encryption algorithm can be constantly changed to thwart any unintended receiving parties from decoding the data. A key (101) and a polynomial (102) are loaded into registers. The key is then loaded into a shift register and shifted through XOR gates (106) at a programmable rate. The other input of the XOR gates comes from the result of ANDing (103) a disable signal, the polynomial register (102), and the last stage of the shift register (104). Eight bits of the shift register outputs are XOR'ed with the input data to be encrypted. The output of these XOR gates (105) is the encrypted data.

    Signal communication method and apparatus

    公开(公告)号:AU646194B2

    公开(公告)日:1994-02-10

    申请号:AU3334793

    申请日:1992-12-28

    Applicant: MOTOROLA INC

    Abstract: A communications system having a plurality of different radio-types (528, 530 and 532) when integrated into a single node or control module (500) provides communications with a plurality of different end users (502, 506 and 508) having different transmission protocols. The steps involved comprise coupling the plurality of communication devices (528, 530 and 532) together via a bus (526) and coupling at least one processing unit (517) to the bus (526). Signals received by RF devices (528, 530 and 532) are communicated onto the bus (526) and processed by the processing unit (517) into processed signals. Processed signals comprise data and control information which are stored in memory (522). Thereafter, the processed signals stored in memory (522) are returned back onto the bus (526) for use by at least one of the plurality of communication devices (528, 530 and 532).

    106.
    发明专利
    未知

    公开(公告)号:MX9303930A

    公开(公告)日:1994-01-31

    申请号:MX9303930

    申请日:1993-06-30

    Applicant: MOTOROLA INC

    Abstract: A wireless infrared (IR) communications system (100) for communicating packetized information (302) between a control module (12) and a plurality of UMs (14) via infrared transceivers (300/320) is described as having a selectable communications path. In this system at least the user module (14) has a plurality of IR device arrays (A1-A6) for receiving IR signals (312/312') in relatively narrow IR field of view sectors, and selection circuit (20), coupled to said plurality of IR device arrays (A1-A6), for selecting a communication path between the control module (12) and one of said plurality of IR device arrays (A1-A6), based at least partly on received signal (302') qualtity, so as to overcome reception errors caused by multipath interference.

    107.
    发明专利
    未知

    公开(公告)号:BR9200161A

    公开(公告)日:1992-10-06

    申请号:BR9200161

    申请日:1992-01-17

    Applicant: MOTOROLA INC

    Abstract: An apparatus scales binary samples representing a predetermined waveform (109) to achieve every possible transition in a multi-level transmission system. The predetermined waveform (109) is partitioned into M symbol intervals, each symbol interval having a corresponding waveform represented by a series of binary samples V stored in M separate ROM devices (311-316). Depending on the required amplitude and polarity of the transition, logic blocks (351-356) control scaling multipliers (321-326) and polarity multipliers (331-336) to perform the required scaling and inverting of the binary samples retrieved from ROM (311-316). The scaled and inverted samples are added together by an adder (345) and sent to a D/A converter (350) where the desired scaled and inverted waveform is converted/generated from the scaled and inverted binary samples.

    109.
    发明专利
    未知

    公开(公告)号:MX163437B

    公开(公告)日:1992-05-13

    申请号:MX2079990

    申请日:1990-05-21

    Applicant: MOTOROLA INC

    Abstract: There is provided a scheme for bit error rate detection. It is characterised by: detecting the bit value present in a received multi-level signal (102), more narrowly detecting the bit value present in that received multi-level signal (104), comparing the results of narrow detection with the results detected otherwise to identify errors in detection (203, 206, 207 and 209), and accumulating detected symbol errors over unit time. Bit error rate detection can be used for antenna selection-selecting one of a plurality of diversity antennas when the error rate exceeds (213) a certain error threshold.

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