公开(公告)号：JP2003298068A

公开(公告)日：2003-10-17

申请号：JP2002370039

申请日：2002-12-20

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： BRYANT FRANK R

IPC: B41J2/05 ,  B01J19/00 ,  B01L3/00 ,  B41J2/16 ,  F24J3/00 ,  G01N25/48 ,  G01N35/00 ,  H01L21/336 ,  H01L29/786 ,  H01L37/00 ,  H05B3/00 ,  H05B3/26

CPC classification number: H01L29/78696 ,  B01J19/0093 ,  B01J2219/00783 ,  B01J2219/00828 ,  B01J2219/00853 ,  B01J2219/00873 ,  B01L3/5027 ,  B41J2/14129 ,  F24J3/00 ,  G01N25/4826 ,  G01N2035/00376 ,  H01L29/66765 ,  H01L29/78624 ,  H05B3/26 ,  H05B2203/013 ,  H05B2203/017

Abstract: PROBLEM TO BE SOLVED: To provide a small-sized heating element for micro-reaction chamber.
SOLUTION: A thin film transistor formed of polycrystalline silicon is positioned adjacently to a thermal reaction chamber. The gate electrode of the transistor is formed in a silicon substrate and a gate dielectric is positioned on the gate electrode. A pass transistor is coupled with the gate electrode, is positioned adjacently to the gate electrode of a transistor for heating thin film, and has source and drain regions in the same semiconductor substrate. When the pass transistor is enabled, an electric current can be made to flow from the drain to the source of the thin film transistor, because a voltage is impressed upon the gate electrode. The current flows through a high-resistance region and, when the current flows, heat is generated and transmitted to the thermal reaction chamber.
COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：提供用于微反应室的小型加热元件。 解决方案：由多晶硅形成的薄膜晶体管相邻于热反应室。 晶体管的栅极形成在硅衬底中，并且栅极电介质位于栅电极上。 传输晶体管与栅电极耦合，与用于加热薄膜的晶体管的栅电极相邻，并且在同一半导体衬底中具有源极和漏极区。 当使能通过晶体管时，由于电压被施加在栅电极上，所以可以使电流从薄膜晶体管的漏极流到源极。 电流流过高电阻区域，当电流流动时，产生热量并传递到热反应室。 版权所有（C）2004，JPO

公开(公告)号：JP2003273144A

公开(公告)日：2003-09-26

申请号：JP2003023609

申请日：2003-01-31

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： HARRY MICHAEL SIEGEL ,  ANTHONY M CHU

IPC: B29C45/02 ,  B29C45/14 ,  H01L21/56 ,  H01L23/28 ,  H01L23/31

CPC classification number: H01L21/566 ,  H01L23/3107 ,  H01L2924/0002 ,  Y10T428/31663 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To provide a system and a method for employing a preformed film in the transfer molding process for an integrated circuit, which is known as 'film-assisting mold'.
SOLUTION: The system and the method employ the preformed film in the transfer molding process employing a transfer mold to seal a part of the integrated circuit by a molding compound. The configuration of the film copies the molded cavity of the transfer mold by preforming the film composed of a soft substance. Next, the preformed film is arranged so as to be neighbored to the surface of the molded cavity of the transfer mold. The molded cavity is filled with the molding compound to seal the integrated circuit. The preform of the film permits to employ a substance, not proper to use the same in the case of a conventional method.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供在被称为“胶片辅助模具”的集成电路的传递模塑过程中使用预成型膜的系统和方法。 解决方案：该系统和方法在传递模塑过程中使用预成型膜，其中采用转移模具通过模塑料密封集成电路的一部分。 膜的构造通过预先形成由软质物质构成的膜来复制转印模的模制腔。 接下来，将预成型薄膜配置成与转印模具的模制空腔的表面相邻。 模制空腔填充有模制化合物以密封集成电路。 该薄膜的预制件允许采用在常规方法的情况下不适用的物质。 版权所有（C）2003，JPO

公开(公告)号：JP2003078393A

公开(公告)日：2003-03-14

申请号：JP2002232917

申请日：2002-08-09

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： MARIANI GIORGIO ,  ORLANDINI VALTER

IPC: H03H11/04 ,  H03H11/12

CPC classification number: H03H11/0422

Abstract: PROBLEM TO BE SOLVED: To provide technique for generating a stable and process-independent RC time constant used for automatically tuning a continuous-time filter. SOLUTION: The stable and process-independent RC time constant for the precise frequency response of automatic tuning is generated by using a feedback loop, which uses a voltage-control type resistor forcibly making a current equal to a reference current flow through an output node. Only one term of an expression for a time constant which is influenced by process variation is two resistances, which is uniformly influenced by arbitrary process variation to maintain their ratio. An open-loop transfer function for the feedback loop has only one pole. This is because neither a phase-locked loop which introduces a plurality of poles in the feedback loop nor other complicated circuits are used, and hence a time-constant tuning filter is essentially stable.

Abstract translation: 要解决的问题：提供用于生成用于自动调谐连续时间滤波器的稳定且与处理无关的RC时间常数的技术。 解决方案：通过使用电压控制型电阻器强制使电流等于通过输出节点的参考电流流动的反馈环路，产生用于自动调谐的精确频率响应的稳定和过程独立的RC时间常数。 受过程变化影响的时间常数的一个表达式只有一个术语是两个电阻，其均匀地受到任意过程变化的影响以保持其比例。 反馈回路的开环传递函数只有一个极点。 这是因为既不使用在反馈环路中引入多个极点的其他复杂电路的锁相环也不使用，因此时间常数调谐滤波器基本上是稳定的。

公开(公告)号：JP2003068034A

公开(公告)日：2003-03-07

申请号：JP2002186581

申请日：2002-06-26

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： HEYDARI FEREIDOON ,  OZDEMIR HAKAN

IPC: G11B21/10 ,  G11B5/596

CPC classification number: G11B5/59655 ,  G11B5/59688

Abstract: PROBLEM TO BE SOLVED: To provide a circuit and a method for demodulating a read-write head position burst in a servo wedge without the need for over sampling or accurate synchronization. SOLUTION: Sampling signals are obtained with a prescribed timing using the fact that servo burst signals are in a sine wave shape, a square root of the sampling signals is obtained, a peak value of the servo burst signals is computed and servo signals are obtained.

Abstract translation: 要解决的问题：提供用于解调伺服楔形中的读写头位置脉冲串的电路和方法，而不需要过采样或精确同步。 解决方案：使用伺服脉冲串信号为正弦波形，获得采样信号的平方根，计算伺服脉冲串信号的峰值并获得伺服信号的事实，以规定的定时获得采样信号。

公开(公告)号：JP2003006619A

公开(公告)日：2003-01-10

申请号：JP2002101337

申请日：2002-04-03

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： CHEN GEORGE Q

IPC: G06T1/00 ,  G06F17/30 ,  G06T7/00 ,  G06T7/60 ,  H04N13/00

CPC classification number: H04N13/0242 ,  G06T7/33 ,  G06T7/55

Abstract: PROBLEM TO BE SOLVED: To provide a method and a device, with which features can be more effectively collated over a plurality of images. SOLUTION: In this image processing system, a plurality of image features in a first image corresponding to the first view of a scene are detected and a plurality of image features in a second image corresponding to the second view of the same scene are detected. The second image is deviated from the first image as a result of the relative movement of a camera. In this system, matching of two views is determined and on the basis of a total number of adjacent collating object candidate image features, a latent feature couple having the maximum average strength of matching is generated partially at least. Further, on the basis of the calculation of a reprojection error to matched points obtained from the projection reconfiguration of the collation couple, with which multiview matching of images is partially latent at least, a latent collation couple is generated.

Abstract translation: 要解决的问题：提供一种可以在多个图像上更有效地整理特征的方法和装置。 解决方案：在该图像处理系统中，检测与场景的第一视图相对应的第一图像中的多个图像特征，并且检测与相同场景的第二视图相对应的第二图像中的多个图像特征。 由于相机的相对移动，第二个图像偏离了第一个图像。 在该系统中，确定两个视图的匹配，并且基于相邻对照候选图像特征的总数，至少部分地生成具有最大平均强度匹配的潜在特征对。 此外，基于从对照对的投影重新配置获得的匹配点计算重播投影误差，图像的多视点匹配至少部分地被潜在，产生潜在对照对。

公开(公告)号：JP2000077979A

公开(公告)日：2000-03-14

申请号：JP23850799

申请日：1999-08-25

Applicant: Stmicroelectronics Inc ,  エスティーマイクロエレクトロニクス,インコーポレイテッド

Inventor： NGUYEN THI N

IPC: H03H17/00 ,  H03H21/00 ,  H04B3/06

CPC classification number: H03H21/0012

Abstract: PROBLEM TO BE SOLVED: To provide a method/device which can reduce the converging time of a digital filter while maintaining its accuracy.
SOLUTION: When a digital filter is initially run, the coefficients of the filter are adjusted to decrease the output errors of the filter. If the adjusted filter coefficients satisfy the selected error levels, these coefficients are stored in a memory and also the digital filter filters data. When the digital filter is run, the stored coefficients are loaded into the filter and also many repetitive operations are made to run to adjust the coefficients. Then it's decided whether the adjusted coefficients satisfy the threshold that can decide that an error level is equal to the selected one. If the coefficients satisfy the threshold, these coefficients are stored in the memory and also the digital filter is used to filter the data.
COPYRIGHT: (C)2000,JPO

Abstract translation: 要解决的问题：提供一种能够在保持其精度的同时降低数字滤波器的会聚时间的方法/装置。 解决方案：当数字滤波器初始运行时，调整滤波器的系数以减小滤波器的输出误差。 如果调整后的滤波器系数满足选择的误差电平，则这些系数存储在存储器中，并且数字滤波器也对数据进行滤波。 当数字滤波器运行时，存储的系数被加载到滤波器中，并且进行许多重复操作以调整系数。 然后决定调整后的系数是否满足可以决定错误级别等于所选择的阈值的阈值。 如果系数满足阈值，则这些系数存储在存储器中，并且使用数字滤波器来过滤数据。

公开(公告)号：TW201442121A

公开(公告)日：2014-11-01

申请号：TW102145372

申请日：2013-12-10

Applicant: 意法半導體公司 ,  STMICROELECTRONICS, INC. ,  國際商業機械公司 ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： 柳青 ,  LIU, QING ,  王俊利 ,  WANG, JUNLI

IPC: H01L21/336 ,  H01L21/28

CPC classification number: H01L21/823431 ,  H01L21/02112 ,  H01L21/02532 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/82 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/6681

Abstract: 本發明說明了一種用於製造具有使鰭與基板絕緣的絕緣層的鰭式場效電晶體(finFET)裝置之方法。該絕緣層可防止沒有該絕緣層時將流經該基板中之塊狀半導體材料之漏電流。可以塊狀半導體基板開始製造該結構，而不需要絕緣層上覆半導體基板。可以磊晶生長法形成鰭結構，因而可改善該等裝置中之鰭高度的一致性。

Abstract in simplified Chinese: 本发明说明了一种用于制造具有使鳍与基板绝缘的绝缘层的鳍式场效应管(finFET)设备之方法。该绝缘层可防止没有该绝缘层时将流经该基板中之块状半导体材料之漏电流。可以块状半导体基板开始制造该结构，而不需要绝缘层上覆半导体基板。可以磊晶生长法形成鳍结构，因而可改善该等设备中之鳍高度的一致性。

公开(公告)号：WO2014131002A1

公开(公告)日：2014-08-28

申请号：PCT/US2014/018258

申请日：2014-02-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  STMICROELECTRONICS, INC.

Inventor： BASKER, Veeraraghavan, S. ,  LIU, Qing ,  YAMASHITA, Tenko ,  YEH, Chun-Chen

IPC: H01L21/20 ,  H01L21/336 ,  C23C16/42

CPC classification number: H01L29/41791 ,  H01L29/165 ,  H01L29/456 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for forming contacts in a semiconductor device includes forming (208) a plurality of substantially parallel semiconductor fins on a dielectric layer of a substrate having a gate structure formed (210) transversely to a longitudinal axis of the fins. The fins are merged (212) by epitaxially growing a crystalline material between the fins. A field dielectric layer is deposited over the fins and the crystalline material. Trenches that run transversely to the longitudinal axis of the fins are formed (226) to expose the fins in the trenches. An interface layer is formed (228) over portions of the fins exposed in the trenches. Contact lines are formed (234) in the trenches that contact a top surface of the interface layer on the fins and at least a portion of side surfaces of the interface layer on the fins.

Abstract translation: 一种用于在半导体器件中形成触点的方法包括在具有横向于鳍的纵向轴线形成（210）的栅极结构的基底的介电层上形成（208）多个基本上平行的半导体鳍。 翅片通过在翅片之间外延生长结晶材料而合并（212）。 场致电介质层沉积在鳍片和结晶材料上。 形成横向于翅片的纵向轴线延伸的沟槽（226）以暴露沟槽中的翅片。 界面层在暴露在沟槽中的翅片的部分上形成（228）。 接触线在与鳍片上的界面层的顶表面和翅片上的界面层的至少一部分侧表面接触的沟槽中形成（234）。

公开(公告)号：WO2012174169A2

公开(公告)日：2012-12-20

申请号：PCT/US2012/042325

申请日：2012-06-13

Applicant: NEO, TeckKhim ,  MIKULAN, Paul, I. ,  ROBINSON, Murray J. ,  ROSS, Rube M. ,  STMicroelectronics Asia Pacific Pte. Ltd. (Singapore) ,  STMicroelectronics, Inc.

Inventor： NEO, TeckKhim ,  MIKULAN, Paul, I. ,  ROBINSON, Murray J. ,  ROSS, Rube M.

CPC classification number: G06F21/73 ,  G06F21/44 ,  H04L9/3278

Abstract: In an embodiment, to deter or delay counterfeiting/cloning of a replacement component of a host device, the replacement component is provided with a code value. The code value is generated from a value of at least one physical parameter of the replacement component and is stored on the replacement component. The host device determines whether the replacement component is authentic if the stored code value matches a reference code value.

Abstract translation: 在一个实施例中，为了阻止或延迟伪装/克隆主机设备的替换部件，替换部件被提供有代码值。 代码值是从替换组件的至少一个物理参数的值生成的，并存储在替换组件上。 如果存储的代码值与参考代码值匹配，则主机设备确定替换组件是否可信。

公开(公告)号：WO2012170027A1

公开(公告)日：2012-12-13

申请号：PCT/US2011/039774

申请日：2011-06-09

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMicroelectronics, Inc. ,  POSSEME, Nicolas ,  GRENOUILLET, Laurent ,  LE TIEC, Yannick ,  LOUBET, Nicolas ,  VINET, Maud

Inventor： POSSEME, Nicolas ,  GRENOUILLET, Laurent ,  LE TIEC, Yannick ,  LOUBET, Nicolas ,  VINET, Maud

IPC: H01L21/336

CPC classification number: H01L29/66477 ,  H01L21/2652 ,  H01L21/26586 ,  H01L21/823418 ,  H01L21/84 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66772

Abstract: The substrate successively comprises a support substrate, an electrically insulating layer, a semiconductor material layer, and a gate pattern. The semiconductor material layer and gate pattern are covered by a covering layer. A first doping impurity is implanted in the semiconductor material layer through the covering layer so as to place the thickness of maximum concentration of the first doping impurity in the first layer. The covering layer is partly eliminated so as to form lateral spacers leaving source/drain electrodes free.

Abstract translation: 基板依次包括支撑基板，电绝缘层，半导体材料层和栅极图案。 半导体材料层和栅极图案被覆盖层覆盖。 第一掺杂杂质通过覆盖层注入到半导体材料层中，以将第一掺杂杂质的最大浓度的厚度置于第一层中。 覆盖层被部分地消除，以形成离开源极/漏电极的横向间隔物。