公开(公告)号：KR100441470B1

公开(公告)日：2004-11-03

申请号：KR1019970020181

申请日：1997-05-23

Applicant: 미크로나스 세미컨덕터 홀딩 아게

Inventor： 울리히토이스 ,  노르베르트그라이츄스

IPC: H03B5/32

CPC classification number: H03B5/364 ,  H03B2201/0266

Abstract: The circuit (2) is integrated in the CMOS technology, excepting for the resonant crystal (1). The device consists of several basic cells (Z1-Zn) with feedback resistances (R1-Rn). Each cell has two capacitors (C11,C21) connected in parallel with the crystal, two amplifying transistors (p11,n11) and two switching transistors (p21,n21). One capacitor (C11) is switched (S11) to the interconnected gate electrodes of the amplifiers, and the other capacitor (C21) is switched (S21) to the feedback resistance, by a control signal (I1) which is also inverted (5) for one switching transistor (p21), but not for the other (n21).

Abstract translation: 除了谐振晶体（1）之外，电路（2）集成在CMOS技术中。 该器件由几个带反馈电阻（R1-Rn）的基本单元（Z1-Zn）组成。 每个单元有两个与晶体并联的电容器（C11，C21），两个放大晶体管（p11，n11）和两个开关晶体管（p21，n21）。 通过也反转（5）的控制信号（I1），一个电容器（C11）被切换（S11）到放大器的互连栅电极，另一个电容器（C21）被切换（S21） 对于一个开关晶体管（p21），而对另一个（n21）不适用。

公开(公告)号：KR20180050210A

公开(公告)日：2018-05-14

申请号：KR20170132777

申请日：2017-10-12

IPC: H03B5/12 ,  H03B27/00

CPC classification number: H03B5/02 ,  H03B5/1212 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1296 ,  H03B27/00 ,  H03B2200/0074 ,  H03B2200/009 ,  H03B2201/0266

Abstract: 본원의실시예들은듀얼모드발진기및 다중위상발진기를개시한다. 듀얼모드발진기에서, 모드스위칭회로를사용하여두 개의동작모드사이의스위칭이구현되어, 서로상이한두 개의대역을갖는발진신호가획득될수 있다. 또한, 듀얼모드발진기는두 개의변압기결합발진기를포함하고, 임의의변압기결합발진기내의승압변압기는제1 MOS 트랜지스터의드레인전압스윙을승산한다음, 제2 MOS 트랜지스터의게이트에전압신호를인가하여, 발진기의공급전압을증가시키지않으면서더 큰게이트전압스윙이획득되고, 듀얼모드발진기의위상잡음성능이향상된다. 다중위상발진기에서, 다중듀얼모드변압기결합발진기는다중위상결합회로를통해연결되어뫼비우스루프를형성하여, 다중위상의발진신호가생성될수 있고, 전체발진기의위상잡음성능이향상될수 있다.

公开(公告)号：KR1020070118981A

公开(公告)日：2007-12-18

申请号：KR1020070057972

申请日：2007-06-13

Applicant: 내셔널 세미컨덕터 저머니 아게

Inventor： 올뤼그크리스토프 ,  메흐니그슈테판

IPC: H03L7/099

CPC classification number: H03K17/6872 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1265 ,  H03B5/1268 ,  H03B2200/005 ,  H03B2201/0266 ,  H03J5/244 ,  H03J2200/01 ,  H03K17/063 ,  H03K17/162 ,  H03L7/099 ,  H03L7/10

Abstract: Digital adjustment of an oscillator is provided to adjust the oscillation frequency of the oscillator to perform the selective change of an oscillation frequency efficiently without the damping of the oscillator. Digital adjustment of an oscillator includes at least one pair of capacitors(C,C'), first field effect transistors(T1,T1'), a second field effect transistor(T2), and third field effect transistors(T3,T3'). The pair of capacitors have first terminals connected to the oscillator, and second terminals selectively connected to a first reference potential(vss) by the switching arrangement to integrate the capacitors with an oscillation circuit of the oscillator. The first field effect transistors individually connect the second terminals and the first reference potential. The second field effect transistor connects the second terminals to each other. The third field effect transistors individually connect the second terminals and a second reference potential(vdd) which is different from the first reference potential.

Abstract translation: 提供振荡器的数字调整以调节振荡器的振荡频率，以有效地执行振荡频率的选择性变化，而不会造成振荡器的阻尼。 振荡器的数字调节器包括至少一对电容器（C，C'），第一场效应晶体管（T1，T1'），第二场效应晶体管（T2）和第三场效应晶体管（T3，T3'） 。 该对电容器具有连接到振荡器的第一端子，并且第二端子通过开关装置选择性地连接到第一参考电位（vss），以将电容器与振荡器的振荡电路集成。 第一场效应晶体管单独地连接第二端子和第一参考电位。 第二场效应晶体管将第二端子彼此连接。 第三场效应晶体管单独地连接第二端子和与第一参考电位不同的第二参考电位（vdd）。

公开(公告)号：KR100709761B1

公开(公告)日：2007-04-19

申请号：KR1020060042936

申请日：2006-05-12

Applicant: 알프스 덴키 가부시키가이샤

Inventor： 고바야시히로키

IPC: H03B5/24 ,  H03B5/18

CPC classification number: H03B5/1231 ,  H03B5/1218 ,  H03B5/1243 ,  H03B2200/0046 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: 본 발명은 2개의 발진신호를 변환하여 공통의 단자로부터 출력하는 경우에, 발진신호의 감쇠를 적게 하기 위하여, 제 1 주파수대의 발진신호를 출력하는 제 1 발진 트랜지스터(11)와, 제 1 발진 트랜지스터(11)의 콜렉터에 전원을 공급하는 제 1 인덕터(12)와, 제 1 발진 트랜지스터(11)의 동작을 변환하는 제 1 스위치 소자(16)와, 제 2 주파수대의 발진신호를 출력하는 제 2 발진 트랜지스터(21)와, 제 2 발진 트랜지스터(21)의 콜렉터에 전원을 공급하는 제 2 인덕터(22)와, 제 2 발진 트랜지스터(21)의 동작을 변환하는 제 2 스위치 소자(26)와, 제 1 주파수대의 발진신호 또는 제 2 주파수대의 발진신호를 외부에 출력하는 출력단자(30)를 구비하고, 제 1 인덕터(12)와 출력단자(30)와의 사이에 제 1 스위치 소자(16)를 거쳐 삽입하고, 제 2 인덕터(22)와 출력단자(30)와의 사이에 제 2 스위치 소자(26)를 거쳐 삽입하였다.

公开(公告)号：WO2016119823A1

公开(公告)日：2016-08-04

申请号：PCT/EP2015/051573

申请日：2015-01-27

Applicant: HUAWEI TECHNOLOGIES CO., LTD. ,  SHAHMOHAMMADI, Mina ,  BABAIE, Masoud ,  STASZEWSKI, Robert

Inventor： SHAHMOHAMMADI, Mina ,  BABAIE, Masoud ,  STASZEWSKI, Robert

IPC: H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1218 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1265 ,  H03B5/1296 ,  H03B2201/0266

Abstract: The invention relates to a resonator circuit (100), the resonator circuit (100) comprising a transformer (101) comprising a primary winding (103) and a secondary winding (105), wherein the primary winding (103) is inductively coupled with the secondary winding (105), a primary capacitor (107) being connected to the primary winding (103), the primary capacitor (107) and the primary winding (103) forming a primary circuit, and a secondary capacitor (109) being connected to the secondary winding (105), the secondary capacitor (109) and the secondary winding (105) forming a secondary circuit, wherein the resonator circuit (100) has a common mode resonance frequency at an excitation of the primary circuit in a common mode, wherein the resonator circuit (100) has a differential mode resonance frequency at an excitation of the primary circuit in a differential mode, and wherein the common mode resonance frequency is different from the differential mode resonance frequency.

Abstract translation: 本发明涉及一种谐振器电路（100），所述谐振器电路（100）包括包括初级绕组（103）和次级绕组（105）的变压器（101），其中初级绕组（103）感应耦合 次级绕组（105），连接到初级绕组（103）的主电容器（107），形成初级电路的初级电容器（107）和初级绕组（103），以及二次电容器（109） 所述次级绕组（105），所述次级电容器（109）和所述次级绕组（105）形成次级电路，其中所述谐振器电路（100）在共模激励初级电路时具有共模谐振频率， 其中所述谐振器电路（100）在差分模式下在所述初级电路的激励时具有差模谐振频率，并且其中所述共模谐振频率与所述差模谐振频率不同。

公开(公告)号：WO2015065734A1

公开(公告)日：2015-05-07

申请号：PCT/US2014/061116

申请日：2014-10-17

Applicant: QUALCOMM INCORPORATED

Inventor： TERROVITIS, Emmanouil

IPC: H03B5/36

CPC classification number: H03B5/362 ,  H03B5/364 ,  H03B2200/0046 ,  H03B2200/005 ,  H03B2200/0052 ,  H03B2200/0082 ,  H03B2201/0266

Abstract: An oscillator circuit may selectively switch between a normal mode and a low-power mode in response to a mode signal. During the normal mode, the oscillator circuit may employ a first amplifier configuration and a first capacitive loading to generate a high-accuracy clock signal having a relatively low frequency error. During the low power mode, the oscillator circuit may employ a second amplifier configuration and a second capacitive loading to generate a low-power clock signal using minimal power consumption. A compensation circuit may be used to offset a relatively high frequency error during the low-power mode.

Abstract translation: 响应于模式信号，振荡器电路可以选择性地在正常模式和低功率模式之间切换。 在正常模式期间，振荡器电路可以采用第一放大器配置和第一容性负载来产生具有相对较低频率误差的高精度时钟信号。 在低功率模式期间，振荡器电路可采用第二放大器配置和第二容性负载，以使用最小功耗生成低功率时钟信号。 补偿电路可以用于在低功率模式期间抵消相对较高的频率误差。

公开(公告)号：WO2009097047A1

公开(公告)日：2009-08-06

申请号：PCT/US2008/084855

申请日：2008-11-26

Applicant: MARVELL WORLD TRADE LTD. ,  GREENBERG, Jody ,  SUTARDJA, Sehat

Inventor： GREENBERG, Jody ,  SUTARDJA, Sehat

IPC: H03B5/12 ,  H03L1/02 ,  H03L7/081

CPC classification number: H03B5/02 ,  H03B5/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2200/005 ,  H03B2201/0266 ,  H03J2200/10 ,  H03K7/08 ,  H03L1/022 ,  H03L1/026 ,  H03L7/07 ,  H03L7/08 ,  H03L7/0812 ,  H03L7/099 ,  H03L7/22

Abstract: An integrated circuit includes a delay lock loop (DLL) circuit that generates incremental delay line signals and a delay line output signal based on a received clock signal. A pulse-width modulation (PWM) control module generates a PWM control signal. A tunable circuit having variable capacitance is controlled based on the delay line output signal, the PWM control signal, and one of the incremental delay line signals.

Abstract translation: 集成电路包括延迟锁定环（DLL）电路，其基于接收的时钟信号产生增量延迟线信号和延迟线输出信号。 脉冲宽度调制（PWM）控制模块产生PWM控制信号。 基于延迟线输出信号，PWM控制信号和增量延迟线信号之一来控制具有可变电容的可调谐电路。

公开(公告)号：WO2007119276A1

公开(公告)日：2007-10-25

申请号：PCT/JP2007/050951

申请日：2007-01-23

Applicant: 株式会社村田製作所 ,  荒俣 智英

Inventor： 荒俣 智英

IPC: H03B5/02

CPC classification number: H03B5/1231 ,  H03B5/1203 ,  H03B5/1262 ,  H03B2200/0048 ,  H03B2201/0266

Abstract: 　第１，第２の共振回路２，３には第１，第２の増幅回路４，５をそれぞれ接続する。また、選択回路６を第１，第２のスイッチ回路７，８等によって構成し、第１，第２のスイッチ回路７，８を用いて第１，第２の増幅回路４，５を選択的に動作させる。また、第１，第２の増幅回路４，５の出力側には、これらで共通に使用する接地用コンデンサＣ4を接続する。一方、第１のスイッチ回路７には第１の増幅回路４との間に位置して、補助の接地用コンデンサＣ14を接続する。これにより、第１の増幅回路４が動作するときだけ、接地用コンデンサＣ4に補助の接地用コンデンサＣ14を並列接続することができる。

Abstract translation: 第一和第二放大器电路（4,5）分别连接到第一和第二谐振电路（2,3）。 第一和第二开关电路（7,8）构成选择电路（6）。 第一和第二开关电路（7,8）用于选择性地操作第一和第二放大器电路（4,5）。 通常在第一和第二放大器电路（4,5）之间使用的接地电容器（C4）连接到前述放大器电路的输出侧。 另一方面，第一开关电路（7）连接到位于第一开关电路（7）和第一放大电路（4）之间的辅助接地电容器（C14）。 只有当第一放大器电路（4）工作时，这才能使辅助接地电容器（C14）与接地电容器（C4）并联。

公开(公告)号：WO00072446A1

公开(公告)日：2000-11-30

申请号：PCT/US2000/014683

申请日：2000-05-26

IPC: H01F17/00 ,  H01L23/522 ,  H01L27/02 ,  H01L27/08 ,  H03B1/00 ,  H03B5/12 ,  H03B5/36 ,  H03D7/16 ,  H03D7/18 ,  H03G1/00 ,  H03H11/12 ,  H03J1/00 ,  H03J3/04 ,  H03J3/08 ,  H03J3/18 ,  H03L1/02 ,  H03L7/10 ,  H03L7/23

CPC classification number: H03L7/23 ,  H01F17/0006 ,  H01F17/0013 ,  H01F2017/0053 ,  H01F2021/125 ,  H01L23/5227 ,  H01L27/0248 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H03B5/1209 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1253 ,  H03B5/364 ,  H03B2200/0038 ,  H03B2201/025 ,  H03B2201/0266 ,  H03D7/161 ,  H03D7/18 ,  H03G1/0029 ,  H03H11/1291 ,  H03J1/0075 ,  H03J3/04 ,  H03J3/08 ,  H03J3/185 ,  H03J2200/10 ,  H03L1/023 ,  H03L7/10 ,  H01L2924/00

Abstract: An integrated VCO (4532) having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit (4535) responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.

Abstract translation: 具有改进的过程和温度变化调谐范围的集成VCO（4532）。 因此，在本发明的本实施例中提供了集成的VCO。 VCO包括：衬底，响应于设置在衬底上的VCO状态变量的VCO调谐控制电路（4535），以及设置在衬底上的VCO，具有落在VCO调谐范围内的调谐控制电压输入，用于调整 VCO频率输出，并且其调谐范围由调谐控制电路响应于VCO状态变量而调整。

公开(公告)号：WO99060696A1

公开(公告)日：1999-11-25

申请号：PCT/US1999/008558

申请日：1999-04-19

IPC: H03B1/00 ,  H03B5/32

CPC classification number: H03B5/32 ,  H03B2201/0266 ,  H03J2200/10

Abstract: The invention provides a unique apparatus and method which varies the capacitance coupled to a circuit. In one embodiment, the variable capacitance comprises a unique variable capacitance array (402) with multiple capacitance modules (508, 540 and 550) which can be selectively enabled. Each capacitance module has a capacitive value (510, 542, 544, 552 and 556) and a corresponding parasitic capacitance. The invention provides high linearity, low spread, improves the response to power fluctuations by maintaining a consistent relationship between the capacitive value (510, 542, 544, 552 and 556) and the parasitic capacitance in each capacitance module (508, 540 and 550). For example, the invention can be used with devices to provide a linear variation of capacitance. In addition, the invention can be used to calibrate a wide range of devices.

Abstract translation: 本发明提供了一种独特的装置和方法，其改变耦合到电路的电容。 在一个实施例中，可变电容包括具有多个电容模块（508,540和550）的独特的可变电容阵列（402），其可被选择性地使能。 每个电容模块具有电容值（510,542,544,552和556）和相应的寄生电容。 本发明通过保持电容值（510,542,544,552和556）与每个电容模块（508,540和550）中的寄生电容之间的一致关系来提供高线性度，低扩展性，从而改善对功率波动的响应， 。 例如，本发明可以与设备一起使用以提供电容的线性变化。 此外，本发明可用于校准各种各样的器件。