Correction arrangement for an amplifier
    112.
    发明公开
    Correction arrangement for an amplifier 失效
    用于放大器的放大器校正装置的校正布置

    公开(公告)号:EP0297639A3

    公开(公告)日:1989-12-13

    申请号:EP88201128.1

    申请日:1988-06-04

    CPC classification number: H03F3/303 H03F1/308 H03F2200/477

    Abstract: Correction arrangement, for an amplifier, with two correction circuits (CS1,PM2,NM3/2,CS2,NM4,PM4/3) each connected in parallel across the output stage (PM1,NM1) of the amplifier provided with an input differential amplifier stage (A1), with two differential amplifiers (A2/3) constituting an intermediate stage and with the output stage constituted by the series connection of a PMOS transistor (PM1) and an NMOS transistor (NM1) the junction point (VOUT) of which is connected to the input stage via a feedback circuit (FC). Each correction circuit is able to measure the DC current (I1;I2) through an output transistor (PM1, NM1), to compare a measuring DC current (I3;I4) derived from this measured DC current with a reference DC current (I5;I6) and to change the DC voltage on the gate of the other output transistor (NM1;PM1) in function of the difference and to thus produce a correcting function on the amplifier through the feedback circuit.

    Multi-access device
    113.
    发明公开
    Multi-access device 失效
    Mehrfachzugriffsvorrichtung。

    公开(公告)号:EP0320041A2

    公开(公告)日:1989-06-14

    申请号:EP88202675.0

    申请日:1988-11-24

    CPC classification number: H04Q11/0414 G06F13/18

    Abstract: A device (MAM) including a common data resource (RAM) to which a first (PR) and several second (LC) stations are coupled. This device includes a first transmission circuit (DB, MD, LD2, LD1, DBU) coupling the common resource and the first station and, for each of the second stations, a second transmission circuit (DB, MD) coupling the common resource and a buffer circuit (LR; LW) and a third transmission circuit (PISO, SO; SI, SIPO) coupling the buffer circuit and the corresponding second station and which is used at predetermined moments (T1, T2, T3; T4). The device also includes a priority circuit (CLC, SG) which grants the highest priority to the requests for the use of the first transmission circuit and the following priorities to the requests for the use of the second transmission circuits in decreasing order of the frequencies (SOS; SIS) of the corresponding predetermined moments.

    Abstract translation: 一种包括第一(PR)和几个第二(LC)站耦合到其中的公共数据资源(RAM)的设备(MAM)。 该设备包括耦合公共资源和第一站的第一传输电路(DB,MD,LD2,LD1,DBU),并且对于每个第二站,耦合共同资源的第二传输电路(DB,MD)和 缓冲电路(LR; LW)和第三传输电路(PISO,SO; SI,SIPO),耦合缓冲电路和对应的第二站,并在预定时刻(T1,T2,T3; T4)使用。 该设备还包括优先级电路(CLC,SG),其向第一传输电路的使用请求授予最高优先级,并且按照频率递减顺序对第二传输电路的使用请求提供以下优先级 SOS; SIS)相应的预定时刻。

    Asynchronous time division communication system
    114.
    发明公开
    Asynchronous time division communication system 失效
    不同步Zeitmultiplex-Übertragungssystem。

    公开(公告)号:EP0283079A2

    公开(公告)日:1988-09-21

    申请号:EP88200411.2

    申请日:1988-03-05

    CPC classification number: H04J3/0632 H04J3/0658 H04L12/1813

    Abstract: Asynchronous time division system including at least one node with a switching network (BSN) to which a plurality of user stations (US1/N) are coupled via transmission links and which is adapted to interconnect user stations. At least one (US4) of these user stations is a clock station providing clock information, and upon the establishment of a connection between a plurality of other user stations (US1/3), with the purpose of exchanging synchronous data, each of these stations establishes a connection with this clock station.

    Abstract translation: 异步时分系统包括具有交换网络(BSN)的至少一个节点,多个用户站(US1 / N)经由传输链路耦合到该节点,并且适于互连用户站。 这些用户站中的至少一个(US4)是提供时钟信息的时钟站,并且在多个其他用户站(US1 / 3)之间建立连接时,为了交换同步数据,这些站中的每一个 建立与这个时钟站的连接。

    Electrically conductive device
    117.
    发明公开
    Electrically conductive device 失效
    电导体装置

    公开(公告)号:EP0112600A3

    公开(公告)日:1987-02-25

    申请号:EP83201821

    申请日:1983-12-20

    CPC classification number: H01R31/00 H01R12/722

    Abstract: Electrically conductive device constituted by a male connector (1) comprising two end flanges (4, 5) and an electrically conductive bottom part (3) holding a plurality of a male contacts which are adapted to cooperate with the female contacts (12) of a female connector (8). When these connectors are interconnected the female contacts are electrically interconnected and a gap (14) between the connectors (1, 8) permits cleaning of these contacts.

    Abstract translation: 由一个阳连接器(1)构成的导电装置包括两个端部凸缘(4,5)和一个导电底部(3),该导电底部部分(3)保持多个阳性触头,这些阳性触头适于与阴型触头(12)配合 母连接器(8)。 当这些连接器互连时,阴触头电互连,并且连接器(1,8)之间的间隙(14)允许清洁这些触头。

    Electronic contact with associated power limiting means
    118.
    发明公开
    Electronic contact with associated power limiting means 失效
    与相关功率限制装置进行电子接触

    公开(公告)号:EP0199420A1

    公开(公告)日:1986-10-29

    申请号:EP86200679.8

    申请日:1986-04-22

    CPC classification number: H02H9/025 H03K17/0824 H03K17/0826

    Abstract: Electronic contacts and associated devices include a voltage protection device (D1 to D5, Q4, 05, Q7) and a current protection device (R2, Q4, Q6, Q7) for placing an electronic contact (TRX) in the open state when the voltage across and the current flowing in the latter exceed a predetermined voltage (VD) and current (11) values respectively. The predetermined voltage value (VD) is slightly larger than the one (V1) which corresponds to the predetermined current value (11) in the current versus voltage characteristic of this electronic contact.

    Abstract translation: 电子触点和相关设备包括电压保护装置(D1至D5,Q4,05,Q7)和电流保护装置(R2,Q4,Q6,Q7),用于当电压 并且在后者中流动的电流分别超过预定电压(VD)和电流(11)值。 预定电压值(VD)稍大于与该电子触点的电流对电压特性中的预定电流值(11)相对应的那个值(V1)。

    Switching circuits and matrix device using same
    119.
    发明公开
    Switching circuits and matrix device using same 失效
    Umschaltnetzwerk undMatrixgerätdiese Umschaltnetzwerke verwendend。

    公开(公告)号:EP0162969A1

    公开(公告)日:1985-12-04

    申请号:EP84200778.3

    申请日:1984-05-30

    CPC classification number: G09G3/3681 G09G3/3622 G09G3/3692 G09G2310/0283

    Abstract: The invention relates to switching circuits and matrix device using same and having the form of a flat panel comprising a control device and a smectic liquid crystal display including pixels arranged in a coordinate matrix of 400 rows and 720 columns. The control device includes several driver units located along the four sides of the rectangular matrix and serially interconnected along each side so as to constitute bidirectional shift registers for serial control data and information. Each driver unit controls 30 odd or 30 even numbered lines (rows or columns) and is able to apply to these lines for a predetermined duration DC voltages equal to either -150 Volts, -30 Volts, 0 Volt, +30 Volts or +150 Volts in function of these data and information.

    Abstract translation: 本发明涉及使用其的开关电路和矩阵装置,并且具有包括控制装置和包括以400行和720列的坐标矩阵排列的像素的近晶液晶显示器的平板形式。 控制装置包括沿着矩形矩阵的四边定位并沿着每一侧串联连接的多个驱动单元,以便构成用于串行控制数据和信息的双向移位寄存器。 每个驱动器单元控制30个奇数或30个偶数行(行或列),并且能够将这些线应用于预定持续时间等于-150伏,-30伏,0伏,+ 30伏或+150的直流电压 电压在这些数据和信息的功能。

    Telecommunication switching system
    120.
    发明公开
    Telecommunication switching system 失效
    Fernmeldevermittlungssystem。

    公开(公告)号:EP0154371A2

    公开(公告)日:1985-09-11

    申请号:EP85200208.8

    申请日:1985-02-19

    CPC classification number: H04Q11/04 H04Q11/0407

    Abstract: A telecommunication switching system including a plurality of terminal circuits with a common control device coupled with a switching network through a plurality of interface circuits (TCEA/B) operating asynchronously. The common control device includes a processor (PROM, LU, PCA/B, MUX3) and control means (AUTOMATON) to successively allocate that processor to one of the interface circuits.

    Abstract translation: 一种电信交换系统,包括具有通过异步操作的多个接口电路(TCEA / B)与交换网络耦合的公共控制装置的多个终端电路。 公共控制装置包括处理器(PROM,LU,PCA / B,MUX3()和控制装置(AUTOMATON),以将该处理器连续分配给接口电路之一。

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