公开(公告)号：US1470945A

公开(公告)日：1923-10-16

申请号：US60518722

申请日：1922-12-06

Applicant: STEVENS ROBERT H

Inventor： STEVENS ROBERT H

IPC: A01M5/04

CPC classification number: A01M5/04

公开(公告)号：US1352485A

公开(公告)日：1920-09-14

申请号：US33680219

申请日：1919-11-10

Applicant: STEVENS ROBERT W

Inventor： STEVENS ROBERT W

IPC: D21F1/32

CPC classification number: D21F1/32

公开(公告)号：US1216510A

公开(公告)日：1917-02-20

申请号：US11519616

申请日：1916-08-16

Applicant: STEVENS ROBERT H

Inventor： STEVENS ROBERT H

CPC classification number: A44B5/00 ,  Y10T24/3602

公开(公告)号：US1074792A

公开(公告)日：1913-10-07

申请号：US1912696574

申请日：1912-05-11

Applicant: HOOPER CHARLES S ,  STEVENS ROBERT C

Inventor： HOOPER CHARLES S ,  STEVENS ROBERT C

CPC classification number: F22G5/02

公开(公告)号：US1072786A

公开(公告)日：1913-09-09

申请号：US1913744203

申请日：1913-01-25

Applicant: STEVENS ROBERT C

Inventor： STEVENS ROBERT C

CPC classification number: F01B17/04

公开(公告)号：US861774A

公开(公告)日：1907-07-30

申请号：US1906316351

申请日：1906-05-11

Applicant: STEVENS ROBERT C

Inventor： STEVENS ROBERT C

CPC classification number: F22B17/10

公开(公告)号：US6032212A

公开(公告)日：2000-02-29

申请号：US911564

申请日：1997-08-14

Applicant: Jeff Goode ,  Stevens Robert

Inventor： Jeff Goode ,  Stevens Robert

IPC: G06F7/76 ,  G06F13/40 ,  G06F12/10 ,  G06F13/00

CPC classification number: G06F7/768 ,  G06F13/4013

Abstract: A byte-swapping circuit is provides for interfacing PCI systems to VMEbus systems. The circuit allows the PCI bus to selectively enable or disable byte swapping whether the VMEbus system is in master mode or slave mode. Also, the circuit delays the assertion of the DS0/DS1 VMEbus signals until after the byte swapping circuit has completed its operation, thus avoiding violations of the VMEbus timing specification. Finally, the circuit optimizes its performance during block transfer operations by maintaining its byte-swapping configuration constant during each bus cycle in a given block transfer. Thus, the circuit configures itself for the first bus cycle, but eliminates the reconfiguration delay for each bus cycle afterwards. The circuit can also byte-swap data bytes being transferred on the address bus during multiplexed block transfer cycles.

Abstract translation: 一个字节交换电路用于将PCI系统连接到VMEbus系统。 该电路允许PCI总线选择性地启用或禁用字节交换，无论VMEbus系统是处于主模式还是从模式。 此外，电路会延迟DS0 / DS1 VMEbus信号的声明，直到字节交换电路完成其操作，从而避免违反VMEbus时序规范。 最后，该电路通过在给定的块传输中的每个总线周期期间保持其字节交换配置恒定来优化块传输操作期间的性能。 因此，该电路将其自身配置为第一总线周期，但是之后每个总线周期消除了重新配置延迟。 电路还可以在多路复用块传输周期期间对地址总线上传输的数据字节进行字节交换。

公开(公告)号：US3883005A

公开(公告)日：1975-05-13

申请号：US33071073

申请日：1973-02-08

Applicant: STEVENS ROBERT K

Inventor： STEVENS ROBERT K

IPC: B65D88/00 ,  B65D88/30 ,  B65G67/02

CPC classification number: B65D88/30 ,  B65D88/005

Abstract: Transport brackets are affixed to the container and include provisions for achieving transportability with either a crane or a fork lift. Variable storage capacity is provided by an extension bin which is detachably affixed as part of the container. The top and bottom of the container are compatibly configured to provide an interlock between a plurality of stacked containers and a dolly is configured for use with these interlocking provisions. The container is configured to achieve stacking interchangeability when any vertically peripheral sides are aligned and brackets are disposed around the vertical periphery of the container to achieve fork lift accessibility from any direction perpendicular to the vertically peripheral sides.

Abstract translation: 运输支架固定在容器上，并包括用起重机或叉车实现运输性能的规定。 可变存储容量由可拆卸地作为容器的一部分固定的扩展箱提供。 容器的顶部和底部被兼容地构造成在多个堆叠的容器之间提供互锁，并且配置为与这些互锁装置一起使用的台车。 容器被配置成当任何垂直外周侧对齐并且支架围绕容器的垂直周边设置时实现堆叠可互换性，以从垂直于垂直周边的任何方向实现叉车可操作性。

公开(公告)号：US2673931A

公开(公告)日：1954-03-30

申请号：US15089950

申请日：1950-03-21

Applicant: STEVENS ROBERT H

Inventor： STEVENS ROBERT H

IPC: H01Q9/28 ,  H01Q9/44

CPC classification number: H01Q9/28 ,  H01Q9/44

公开(公告)号：US2577717A

公开(公告)日：1951-12-04

申请号：US77822747

申请日：1947-10-06

Applicant: STEVENS ROBERT A

Inventor： STEVENS ROBERT A

IPC: A42B1/24 ,  G09F3/18

CPC classification number: A42B1/248 ,  G09F3/18