Abstract:
PURPOSE: A parallel automatic frequency offset estimation apparatus and a method thereof are provided to calculate a frequency and a phase difference regarding a distorted signal in parallel in a certain interval of a preamble. CONSTITUTION: A reception unit(200) receives a data frame, and a frequency offset estimating unit(300) calculates frequency phase deviations corresponding to each interval at different bit interval in parallel in a certain section of a received data frame and sums up the frequency phase deviations. The frequency offset estimator adds the sum result to a frequency phase deviation and outputs the added result.
Abstract:
PURPOSE: A wireless recognition sensor tag and a method for storing sensor data are provided to store sensor data in memory space of sensor tag during many hours and minimizes the capacity of memory according to the need, thereby reducing power consumption. CONSTITUTION: A sensor unit(120) senses at least one of information. An RF communication unit(110) processes a signal transceiving by RFID reader and wireless. A storage unit(130) stores command necessary for a tag operation, data, and sensed information the sensor unit. A control unit(140) compares a new sensor data of the sensor and sensor data of just before. If the compared result satisfies the standard, the control unit records the new sensor data to the storage unit.
Abstract:
A digital analog converter and an operating method thereof are provided to control an electrical parameter without maintaining linearity in a system requiring a point to point control based on a lookup table by outputting an increasing analog value with the point to point nonlinear characteristic by corresponding to a digital input value. A digital analog converter converts a digital input value comprised of N bits into the 2N analog values and outputs the converted value. A nonlinear reference signal generator(20) includes a decoder and a signal generator(24). A signal generator includes a power unit, a device part, and a voltage divider. A power supply unit supplies the reference voltage. The device part includes 2n devices with different impedance connected in series. The voltage divider outputs the distribution voltage in proportion to the sum of impedance about the number of devices corresponding to the digital input value among the 2n devices as the analog value.
Abstract:
An apparatus for reconfiguring establishment and collecting a signal is provided to reduce the number of devices by connecting a digital alarm signal collecting block and an environment reestablishing unit through one serial bus. An integrated control unit(113) is connected to first to n alarm signal collecting units, and first to n environment reestablishing units through a serial bus(110) transmitting and receiving the data. The first to n alarm signal collecting units(100a-100n) and the first to n environment reestablishing units(105a-105n) have respective addresses. The first to n alarm signal collecting units and the first to n environment reestablishing units are connected to the serial bus. The first to n alarm signal collecting units and the first to n environment reestablishing units share the bus clock and a command signal. The second to n alarm signal collecting units and the second to n environment reestablishing units connect the serial bus data input signal and the serial bus data output subordinately.
Abstract:
A wavelength initializing method using an external lookup table, and an optical transceiver of a wavelength variable type using the same are provided to perform wavelength initialization of a self-tuning way easily by mounting the lookup table to a controller of an external host and sharing a control function including a lookup function with the host. An optical transceiver(420) converts electrical signals into optical signals of wavelength variable type. A memory unit(430) stores a lookup table including information controlling the wavelength of the optical signals, and transmits the lookup table to an external host after connecting to the external host. The optical transceiver comprises a laser driver(412) which generates bias current, a laser diode(422) which converts electric signals into optical signals, and a wavelength control unit(423) which controls the wavelength of the optical signals after receiving the wavelength control information of the lookup table.
Abstract:
A PCS(Physical Coding Sublayer) apparatus and the Ethernet layer architecture of a T-PON(Tunable-Wavelength Passive Optical Network System) having a wavelength variable type optical source are provided to support a wavelength initialization and alignment of an ONT(Optical Network Terminal) based on a PLC-ECL(Planar Lightwave Circuit-External Cavity Laser) by independently determining an ONT optical signal. A PCS apparatus of a T-PON having a wavelength variable type optical source includes a wavelength monitoring unit(615), and an automatic recognition unit(614), a transmission unit(611), and a receiving unit(612). The wavelength monitoring unit(615) extracts wavelength information from a digital frame signal transmitted from an ONT, and monitors whether the wavelength information is ONT optical source assignment wavelength information or not. If the wavelength information is not matched with the optical source assignment information of the ONT, the automatic recognition unit(614) adds wavelength control information to the digital frame signal and transmits the added information to the ONT. If the wavelength information is matched with the optical source assignment information of the ONT, the transmission unit(611) encodes and transmits the data transmitted from the ONT to a MAC layer. The receiving unit(612) decodes and receives data of the MAC layer.
Abstract:
본 발명은 이더넷 기반 디지털 방송 서비스를 제공하는 광네트워크 유니트 및 그 서비스 방법에 관한 것으로 특히, EPON망을 통해 디지털 방송 데이터를 제공함에 있어서 보다 간단한 방식 및 저렴한 비용으로 디지털 방송의 활성화를 꾀할 수 있는 이더넷 기반 디지털 방송 서비스를 제공하는 광네트워크 유니트 및 그 서비스 방법에 관한 것이다. 본 발명이 개시하는 EPON망을 통해 이더넷 기반 디지털 방송 서비스를 제공하는 광네트워크 유니트는 OLT로부터 수신되는 이더넷 프레임을 디지털 방송 프레임과 기타 프레임으로 분류하는 수신 프레임 분류부; 상기 방송 프레임을 채널별로 분류하는 방송 프레임 분류부; 및 가입자가 요구하는 방송의 채널을 판별하여 상기 가입자에게 상기 채널에 해당하는 방송 프레임을 전송 처리하는 방송 프레임 처리부를 포함하여 본 발명의 목적 및 기술적 과제를 달성한다.
Abstract:
PURPOSE: A ring selecting method is provided to efficiently use a ring bandwidth by preventing concentration of packets onto a specific ring and distributing frequency of use of ring. CONSTITUTION: A ring selecting method comprises a step(S501) of permitting a transmitting node to broadcast an address resolution protocol(ARP) request message to all nodes; a step(S502) of permitting the receiving node which has received the ARP request message to check the address of media access control(MAC); a step(S503) of permitting the receiving node to compare topology maps of the receiving node; a step(S504) of permitting the receiving node to select the ring having the ring with the least absorption and transmit the ARP message to the transmitting node; a step(S505) of permitting the transmitting node to update a routing table, and calculate a usage rate; a step(S506) of permitting the transmitting node to perform a ring selecting algorithm; a step(S507) of creating a packet when a ring is selected; a step(S508) of setting the number of the selected ring; and a step(S509) of transmitting the packet to the receiving node.
Abstract:
PURPOSE: An ATM(Asynchronous Transfer Mode) interface device for a high-speed router system is provided to perform an interface with an ATM network which supports a transmission speed with 622Mbps, in an IP(Internet Protocol)-based high-speed router. CONSTITUTION: A physical layer interface unit(201) connects to an ATM network by an optical interface. Transmission/reception cell converting units(209,207) convert an ATM cell into an IP packet type, and convert data inputted as an IP packet type into an ATM cell type. Transmission/reception memories(208,202) store data in the cell conversion of the transmission/reception cell converting units(209,207). A network processor(204) analyzes and processes packet information, forwards processed packet information to an output port, and performs an interface with a switch. A memory(205) stores data when performing the packet processing and forwarding functions. Transmission/reception data bus converting units(213,203) convert a protocol between the network processor(204) and the transmission/reception cell converting units(209,207). A control bus converting unit(212) converts a serial bus into a parallel bus, between the network processor(204) and the physical layer interface unit(201). A host processor(206) manages resources of the entire line interface module of a high-speed router system.
Abstract:
PURPOSE: A system for clock synchronization between a dual switch board and a line connection board is provided, which achieves clock synchronization between the switch board and the line connection board, and supplies a stable clock to each line connection board. CONSTITUTION: The system comprises two dual switch boards(210,220) performing switching according to a switching signal and a plurality of line connection boards(230,240) connected to the switch boards by a signal line to transmit a synchronous clock. Each switch board includes a switching part(211,221) performing switching according to the switching signal and generating a control signal indicating dual state by exchanging the dual control signal between each switch board, and a synchronous clock circuit part(212,222) generating a self clock using a clock generated by an external synchronous reference clock or a clock generated by self oscillation and then supplying it to the switching part. The synchronous clock circuit part generates a synchronous clock using the clock generated by self oscillation or the external synchronous reference clock only when the present switching board is in an active state, and supplies the generated synchronous clock to the plurality of line connection boards through the signal line.