公开(公告)号：US20210041182A1

公开(公告)日：2021-02-11

申请号：US16533235

申请日：2019-08-06

Applicant: Intel Corporation

Inventor： Feras Eid ,  Telesphor Kamgaing ,  Georgios Dogiamis ,  Aleksandar Aleksov ,  Johanna M. Swan

IPC: F28D15/04 ,  H01L23/367 ,  H01L23/38 ,  H01L23/427

Abstract: Disclosed herein are structures and assemblies that may be used for thermal management in integrated circuit (IC) packages.

公开(公告)号：US20200303329A1

公开(公告)日：2020-09-24

申请号：US16397718

申请日：2019-04-29

Applicant: Intel Corporation

Inventor： Adel A. Elsherbini ,  Georgios Dogiamis ,  Telesphor Kamgaing ,  Henning Braunisch ,  Johanna M. Swan ,  Shawna M. Liff ,  Aleksandar Aleksov

IPC: H01L23/66 ,  H01L23/00

Abstract: Embodiments may relate to a microelectronic package that includes a radio frequency (RF) chip coupled with a die by interconnects with a first pitch. The RF chip may further be coupled with a waveguide of a package substrate by interconnects with a second pitch that is different than the first pitch. The RF chip may facilitate conveyance of data to the waveguide as an electromagnetic signal with a frequency greater than approximately 20 gigahertz (GHz). Other embodiments may be described or claimed.

公开(公告)号：US20200258827A1

公开(公告)日：2020-08-13

申请号：US16641219

申请日：2017-09-29

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Veronica Strong ,  Kristof Darmawikarta ,  Arnab Sarkar

IPC: H01L23/498 ,  H01L21/48 ,  H05K1/11 ,  H05K3/18

Abstract: A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.

公开(公告)号：US20200219816A1

公开(公告)日：2020-07-09

申请号：US16648332

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Johanna M. Swan

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/498 ,  H01L25/16 ,  H01L23/00 ,  H01L23/13 ,  H01L23/367

Abstract: Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate including a dielectric material having a first surface and an opposing second surface, a first photodefinable material on at least a portion of the second surface, and a second photodefinable material on at least a portion of the first photodefinable material, wherein the second photodefinable material has a different material composition than the first photodefinable material.

公开(公告)号：US20200211949A1

公开(公告)日：2020-07-02

申请号：US16232898

申请日：2018-12-26

Applicant: Intel Corporation

Inventor： Veronica Aleman Strong ,  Aleksandar Aleksov

IPC: H01L23/498 ,  H01L23/66 ,  H01L23/00 ,  H01L21/48 ,  H01P3/06 ,  H01P11/00 ,  G06F1/16

Abstract: Disclosed herein are via-trace-via structures with improved alignment, and related devices and methods. For example, in some embodiments, an integrated circuit (IC) package substrate may include a conductive trace having a first surface and an opposing second surface; a first conductive via in a first dielectric layer, wherein the first conductive via is in contact with the first surface of the conductive trace; and a second conductive via in a second dielectric layer, wherein the second conductive via is in contact with the second surface of the conductive trace, wherein the second dielectric layer is on the first dielectric layer, and wherein the first conductive via, the second conductive via, and the conductive trace have a same width between 0.5 um and 25 um.

公开(公告)号：US10477688B2

公开(公告)日：2019-11-12

申请号：US14757992

申请日：2015-12-24

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Srinivas V. Pietambaram ,  Rahul N. Manepalli

IPC: H05K1/18 ,  H05K1/02

Abstract: A stretchable electronic assembly comprising a stretchable body, a plurality of electronic components encapsulated in the stretchable body, at least one meandering conductor connected to at least one electronic component of the plurality of electronic components, at least one hollow pocket formed in the stretchable body, the at least one meandering conductor encapsulated in the stretchable body and the at least one meandering conductor located within the at least one hollow pocket formed in the stretchable body.

公开(公告)号：US20190281717A1

公开(公告)日：2019-09-12

申请号：US16335050

申请日：2016-09-28

Applicant: INTEL CORPORATION

Inventor： Aleksandar Aleksov ,  Son V. Nguyen ,  Rajat Goyal ,  David B. Lampner ,  Dilan Seneviratne ,  Albert S. Lopez ,  Joshua D. Heppner ,  Srinivas V. Pietambaram ,  Shawna M. Liff ,  Nadine L. Dabby

IPC: H05K5/06 ,  H05K5/00 ,  H05K5/02

Abstract: The document discloses a stretchable packaging system for a wearable electronic device. The system includes a first electronic component and a flexible trace connected to the first electronic component. An elastomer layer having a variable thickness at least partially encapsulates the first electronic component and the flexible trace. A first region of the layer has a first thickness that is greater than a second thickness of a second region of the layer that at least partially encapsulates the trace.

公开(公告)号：US20190198961A1

公开(公告)日：2019-06-27

申请号：US16329587

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Georgios C. Dogiamis ,  Telesphor Kamgaing ,  Sasha N. Oster ,  Adel A. Elsherbini ,  Shawna M. Liff ,  Johanna M. Swan ,  Brandon M. Rawlings ,  Richard J. Dischler

IPC: H01P3/16 ,  H01Q9/04 ,  H01P11/00

CPC classification number: H01P3/16 ,  H01P3/122 ,  H01P11/002 ,  H01P11/006 ,  H01Q9/045 ,  H04L67/10

Abstract: A method of forming a waveguide comprises forming an elongate waveguide core including a dielectric material; and arranging a conductive sheet around an outside surface of the dielectric core to produce a conductive layer around the waveguide core.

公开(公告)号：US10251272B2

公开(公告)日：2019-04-02

申请号：US15639873

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Feras Eid ,  Thomas L. Sounart ,  Georgios C. Dogiamis ,  Johanna M. Swan

IPC: H05K1/16 ,  H05K3/46 ,  H01L23/498 ,  H01L21/48 ,  H05K3/12 ,  H05K3/00 ,  H05K3/22

Abstract: Embodiments of the invention include a microelectronic device that includes a plurality of organic dielectric layers and a capacitor that is integrated with a first organic dielectric layer of the plurality of organic dielectric layers. The capacitor includes first and second conductive electrodes and an ultra-high-k dielectric layer that is positioned between the first and second conductive electrodes.

公开(公告)号：US10215164B2

公开(公告)日：2019-02-26

申请号：US14961116

申请日：2015-12-07

Applicant: Intel Corporation

Inventor： Nadine L. Dabby ,  Feras Eid ,  Adel A. Elsherbini ,  Braxton Lathrop ,  Aleksandar Aleksov ,  Sasha Oster

IPC: H01L41/113 ,  F03G5/08 ,  H02N2/18

Abstract: A device for harvesting energy from fabric or clothing includes a piece of fabric or clothing. One or more piezoelectric harvesters are coupled with the piece of fabric or clothing. The piezoelectric harvesters are capable of producing electric energy in response to the movement of the piece of fabric or clothing. Additionally, the device includes one or more energy storage mediums coupled to the one or more piezoelectric harvesters. The energy storage mediums are capable of storing the energy produced by the one or more piezoelectric harvesters. Further, the method for harvesting energy from fabric or clothing involves moving a piece of fabric such that one or more piezoelectric harvesters generate electricity. The method for harvesting energy from fabric or clothing also involves storing the generated electricity in one or more energy storage mediums.