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公开(公告)号：US20180292895A1
公开(公告)日：2018-10-11
申请号：US15483442
申请日：2017-04-10
Applicant: Intel Corporation
Inventor： Travis T. Schluessler , Joydeep Ray , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Jefferson Amstutz , Carson Brownlee , Vivek Tiwari , Sayan Lahiri , Kai Xiao , Abhishek R. Appu , ElMoustapha Ould-Ahmed-Vall , Deepak S. Vembar , Ankur N. Shah , Balaji Vembu , Josh B. Mastronarde
Abstract: An embodiment of a graphics apparatus may include a facial expression detector to detect a facial expression of a user, and a parameter adjuster communicatively coupled to the facial expression detector to adjust a graphics parameter based on the detected facial expression of the user. The detected facial expression may include one or more of a squinting, blinking, winking, and facial muscle tension of the user. The graphics parameter may include one or more of a frame resolution, a screen contrast, a screen brightness, and a shading rate. Other embodiments are disclosed and claimed.
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112.发明授权公开(公告)号：US09971580B2
公开(公告)日：2018-05-15
申请号：US15074247
申请日：2016-03-18
Applicant: INTEL CORPORATION
Inventor： Daniel H. Walsh , Travis T. Schluessler , Larry E. Wickstrom
IPC: G06F9/45
CPC classification number: G06F8/4441 , G06F8/45
Abstract: A mechanism is described for facilitating fast access and use of common data values relating to applications in parallel computing environments. A method of embodiments, as described herein, includes detecting a software application being hosted by a computing device, where the software application is further detected as accessing common data values. The method may further include determining whether access to the common data values is slow, and accessing an existing compiled program specific to the common data values at a database, if the access to the common data values is slow. The method may further include loading the existing compiled program to be executed by a processor at the computing device, where the existing compiled program to replace an originally compiled program.
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公开(公告)号：US20180013676A1
公开(公告)日：2018-01-11
申请号：US15711027
申请日：2017-09-21
Applicant: Intel Corporation
Inventor： Steen K. Larsen , Bryan E. Veal , Daniel S. Lake , Travis T. Schluessler , Mazhar I. Memon
IPC: H04L12/801 , G06F1/32 , H04L12/12 , H04L12/861
Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
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公开(公告)号：US20170287209A1
公开(公告)日：2017-10-05
申请号：US15083771
申请日：2016-03-29
Applicant: Intel Corporation
Inventor： John G. Gierach , Travis T. Schluessler
CPC classification number: G06T15/80 , G06T1/20 , G06T11/40 , G06T15/005
Abstract: By determining if there is redundancy between sub-samples in a multi-sampled anti-aliasing shader, determining which of at least two optimization techniques to use to reduce redundancy and eliminating a redundant shader thread using the selected technique, performance can be improved and power consumption may be reduced when sampling at the sample frequency in multi-sampled anti-aliasing.
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115.发明申请公开(公告)号：US20170269914A1
公开(公告)日：2017-09-21
申请号：US15074247
申请日：2016-03-18
Applicant: INTEL CORPORATION
Inventor： Daniel H. Walsh , Travis T. Schluessler , Larry E. Wickstrom
IPC: G06F9/45
CPC classification number: G06F8/4441 , G06F8/45
Abstract: A mechanism is described for facilitating fast access and use of common data values relating to applications in parallel computing environments. A method of embodiments, as described herein, includes detecting a software application being hosted by a computing device, where the software application is further detected as accessing common data values. The method may further include determining whether access to the common data values is slow, and accessing an existing compiled program specific to the common data values at a database, if the access to the common data values is slow. The method may further include loading the existing compiled program to be executed by a processor at the computing device, where the existing compiled program to replace an originally compiled program.
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Patent Agency Ranking
公开(公告)号：US09608821B2
公开(公告)日：2017-03-28
申请号：US14510534
申请日：2014-10-09
Applicant: Intel Corporation
Inventor： Ravi L. Sahita , Travis T. Schluessler
CPC classification number: H04L9/3234 , G06F9/45558 , G06F12/1433 , G06F12/1491 , G06F21/53 , G06F21/72 , G06F2009/45587 , G06F2221/034 , G06F2221/2149 , G06F2221/2153
Abstract: A system and method for high performance secure access to a trusted platform module on a hardware virtualization platform. The virtualization platform including Virtual Machine Monitor (VMM) managed components coupled to the VMM. One of the VMM managed components is a TPM (Trusted Platform Module). The virtualization platform also includes a plurality of Virtual Machines (VMs). Each of the virtual machines includes a guest Operating System (OS), a TPM device driver (TDD), and at least one security application. The VMM creates an intra-partition in memory for each TDD such that other code and information at a same or higher privilege level in the VM cannot access the memory contents of the TDD. The VMM also maps access only from the TDD to a TPM register space specifically designated for the VM requesting access. Contents of the TPM requested by the TDD are stored in an exclusively VMM-managed protected page table that provides hardware-based memory isolation for the TDD.
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公开(公告)号：US09563253B2
公开(公告)日：2017-02-07
申请号：US13797876
申请日：2013-03-12
Applicant: Intel Corporation
Inventor： Selvakumar Panneer , Tion A. Thomas , Travis T. Schluessler , Adam Z. Leibel
CPC classification number: G06F1/3234 , G06F1/3215 , G06F1/3228 , G06F1/3243 , G06F1/329 , G06F9/4881 , G06F9/4893 , Y02D10/152 , Y02D10/24 , Y02D50/20
Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for monitoring a task of a graphics processing unit (GPU) by a graphics driver, determining if the task is complete, determining an average task completion time for the task if the task is not complete and enabling a sleep state for a processing circuit for a sleep state time if the average task completion time is greater than the sleep state time.
Abstract translation: 各种实施例通常涉及用于通过图形驱动程序监视图形处理单元（GPU）的任务的装置，方法和其他技术，确定任务是否完整，如果任务是任务，则确定任务的平均任务完成时间 如果平均任务完成时间大于睡眠状态时间，则不能完成并为休眠状态时间的处理电路启用睡眠状态。
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公开(公告)号：US09524536B2
公开(公告)日：2016-12-20
申请号：US14341467
申请日：2014-07-25
Applicant: INTEL CORPORATION
Inventor： Robert B. Taylor , Travis T. Schluessler
IPC: H04N19/136 , H04N19/12 , H04N19/154 , G06T1/60 , H04N19/90 , G09G5/00 , H04L12/26 , G06T9/00 , G06F3/14 , G09G5/393
CPC classification number: G06T1/60 , G06F3/14 , G06T9/00 , G09G5/001 , G09G5/393 , G09G2340/02 , G09G2350/00 , G09G2370/16 , H04L43/0882 , H04N19/12 , H04N19/136 , H04N19/154 , H04N19/90
Abstract: Compression techniques for dynamically-generated graphics resources are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to determine one or more usage characteristics of a dynamically-generated graphics resource, determine whether to compress the dynamically-generated graphics resource based on the one or more usage characteristics, and in response to a determination to compress the dynamically-generated graphics resource, select a compression procedure based on a graphics quality threshold for the dynamically-generated graphics resource. Other embodiments are described and claimed.
Abstract translation: 描述了用于动态生成的图形资源的压缩技术。 在一个实施例中，例如，设备可以包括其硬件中的至少一部分的逻辑，用于确定动态生成的图形资源的一个或多个使用特性的逻辑，确定是否压缩动态生成的图形资源 基于一个或多个使用特征，并且响应于压缩动态生成的图形资源的确定，基于动态生成的图形资源的图形质量阈值来选择压缩过程。 描述和要求保护其他实施例。
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公开(公告)号：US20150163143A1
公开(公告)日：2015-06-11
申请号：US14628834
申请日：2015-02-23
Applicant: Intel Corporation
Inventor： Steen K. Larsen , Bryan E. Veal , Daniel S. Lake , Travis T. Schluessler , Mazhar I. Memon
IPC: H04L12/801 , G06F1/32
Abstract: In an embodiment, a method includes identifying a core of a multicore processor to which an incoming packet that is received in a packet buffer is to be directed, and if the core is powered down, transmitting a first message to cause the core to be powered up prior to arrival of the incoming packet at a head of the packet buffer. Other embodiments are described and claimed.
Abstract translation: 在一个实施例中，一种方法包括识别多核处理器的核心，对于分组缓冲器中接收的输入分组将被引导至多核处理器，并且如果核心断电，则发送第一消息以使得核心被供电 在进入分组到达分组缓冲器的头部之前。 描述和要求保护其他实施例。
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120.发明授权公开(公告)号：US12108239B2
公开(公告)日：2024-10-01
申请号：US17816960
申请日：2022-08-02
Applicant: Intel Corporation
Inventor： Joydeep Ray , Travis T. Schluessler , Prasoonkumar Surti , John H. Feit , Nikos Kaburlasos , Jacek Kwiatkowski , Abhishek R. Appu , James M. Holland , Jeffery S. Boles , Jonathan Kennedy , Louis Feng , Atsuo Kuwahara , Barnan Das , Narayan Biswal , Stanley J. Baran , Gokcen Cilingir , Nilesh V. Shah , Archie Sharma , Mayuresh M. Varerkar
CPC classification number: H04S7/303 , G06F3/016 , G06T1/20 , G06T15/06 , G09B21/003 , G09B21/006 , G09B21/008 , H04R1/406 , H04R3/005 , H04S2400/11 , H04S2420/01
Abstract: Systems, apparatuses and methods may provide away to render augmented reality (AR) and/or virtual reality (VR) sensory enhancements using ray tracing. More particularly, systems, apparatuses and methods may provide a way to normalize environment information captured by multiple capture devices, and calculate, for an observer, the sound sources or sensed events vector paths. The systems, apparatuses and methods may detect and/or manage one or more capture devices and assign one or more the capture devices based on one or more conditions to provide observer an immersive VR/AR experience.
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