SINGLE STAGE FREQUENCY MULTIPLIER USING DIFFERENT TYPES OF SIGNAL MIXING MODES

    公开(公告)号:US20220352853A1

    公开(公告)日:2022-11-03

    申请号:US17694953

    申请日:2022-03-15

    Abstract: A frequency multiplier includes an input section having inputs to receive an input signal having an input frequency, a mixer section, and an output section magnetically coupled to the input section and generating an output signal in response to the input signal. The mixer section may be coupled to the input section by a common mode node forming a path for a common mode current to flow to the mixer section and be magnetically coupled to the common mode node. The input section may generate a signal current, and the mixer section may be magnetically coupled to the input section and be directly capacitively coupled to the input section through a capacitor in a signal current path. The mixer section may have differential inputs capacitively coupled to the input section and also be coupled to the input section through a current path. A current helper section may be coupled to the current path.

    Single stage frequency multiplier using different types of signal mixing modes

    公开(公告)号:US11316476B1

    公开(公告)日:2022-04-26

    申请号:US17246425

    申请日:2021-04-30

    Abstract: A frequency multiplier includes an input section to receive a quadrature phase input signal having an input frequency, a mixer section coupled to the input section by a common mode node that forms a path for the common mode signal current to flow to the mixer section and magnetically coupled to the common mode node or capacitively coupled to the input section to generate a differential switching voltage at odd multiples of twice the input frequency, which switching voltage is applied to inputs of the mixer section, and an output section magnetically coupled to the mixer section, the output section being configured to generate an output voltage having a dominate frequency and sub-dominate frequencies spaced apart by the first multiple, the dominate frequency of the output voltage being a second multiple of the input frequency, where the second multiple is greater than the first multiple. Various arrangements are provided.

    Charge pump
    116.
    发明授权

    公开(公告)号:US11088696B2

    公开(公告)日:2021-08-10

    申请号:US16731739

    申请日:2019-12-31

    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

    CHARGE PUMP
    117.
    发明申请

    公开(公告)号:US20210203329A1

    公开(公告)日:2021-07-01

    申请号:US16731739

    申请日:2019-12-31

    Abstract: In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground.

    CONTACTLESS INTERFACE FOR MM-WAVE NEAR FIELD COMMUNICATION

    公开(公告)号:US20200162127A1

    公开(公告)日:2020-05-21

    申请号:US16773557

    申请日:2020-01-27

    Abstract: A system is provided in which a first waveguide has a first resonator coupled to an end of the first waveguide. A second waveguide has a second resonator coupled to the second waveguide. The first resonator is spaced apart from the second resonator by a gap distance. Transmission of a signal propagated by the first waveguide across the gap to the second waveguide is enhanced by a confined near field mode magnetic field produced by the first resonator in response to the propagating wave that is coupled to the second resonator.

    Contactless communication for battery information

    公开(公告)号:US10182116B2

    公开(公告)日:2019-01-15

    申请号:US15380487

    申请日:2016-12-15

    Abstract: One example includes a system is comprised of an elongated transmission line and as module. The elongated transmission line includes an arrangement of transmission line couplers distributed along its length at spaced apart locations. The module has an outer surface and is comprised of a transmitter, and a transmitter coupler. The transmitter transmits a radio frequency signal. The transmitter coupler is on the outer surface of the module, electrically connects with the transmitter, and aligns to couple with a respective one of the transmission line couplers to provide a contactless communication link between the transmitter and the elongated transmission line.

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