公开(公告)号：US20140132431A1

公开(公告)日：2014-05-15

申请号：US14162567

申请日：2014-01-23

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Jesper STEENSGAARD-MADSEN

IPC: H03M1/20

CPC classification number: H03M1/201 ,  H03M1/0641 ,  H03M1/0668 ,  H03M1/462 ,  H03M1/468

Abstract: An analog-to-digital converter (ADC) system and method. The ADC system in accord with one embodiment includes a sampling digital-to-analog converter configured to sample a combination of an analog signal value and an analog dither value, and a control circuit comprising a mismatch-shaping encoder. The control circuit is configured to sequentially apply a plurality of digital codes to the sampling digital-to-analog converter during an analog-to-digital conversion operation to derive a digital code representing the combination of the analog signal value and the analog dither value. Several embodiments are presented.

Abstract translation: 一种模数转换器（ADC）系统和方法。 根据一个实施例的ADC系统包括被配置为对模拟信号值和模拟抖动值的组合进行采样的采样数模转换器，以及包括失配整形编码器的控制电路。 控制电路被配置为在模数转换操作期间将多个数字代码顺序地应用于采样数模转换器，以导出表示模拟信号值和模拟抖动值的组合的数字代码。 呈现了几个实施例。

公开(公告)号：US08698666B1

公开(公告)日：2014-04-15

申请号：US13633017

申请日：2012-10-01

Applicant: Omnivision Technologies, Inc.

Inventor： Guangbin Zhang ,  Jiangtao Kuang

IPC: H03M1/12 ,  H03M1/00 ,  H03M1/06

CPC classification number: H03M1/201 ,  H03M1/123

Abstract: A random estimation analog-to-digital converter for converting a first analog signal into a digital signal includes a random bit generator, a digital-to-analog converter, a summer, an M-bit analog-to-digital converter, and a digital combiner. The random bit generator generates random least significant bits (LSBs) and the digital-to-analog converter then converts the random LSBs into a second analog signal. The summer subtracts the second analog signal from the first analog signal in the analog domain. The M-bit analog-to-digital converter then converts the modified first analog signal into the most significant bits (MSBs) of the digital image signal. The digital combiner combines the random LSBs with the MSBs in the digital domain to generate the digital signal. In one example, the random LSBs are extra bits that are beyond the maximum resolution of the M-bit analog-to-digital converter.

Abstract translation: 用于将第一模拟信号转换为数字信号的随机估计模数转换器包括随机位产生器，数 - 模转换器，加法器，M位模数转换器和数字 组合器 随机位发生器产生随机最低有效位（LSB），然后数模转换器将随机LSB转换为第二模拟信号。 夏季从模拟域中的第一个模拟信号中减去第二个模拟信号。 然后，M位模数转换器将经修改的第一模拟信号转换为数字图像信号的最高有效位（MSB）。 数字组合器将随机LSB与数字域中的MSB组合以产生数字信号。 在一个示例中，随机LSB是超出M位模数转换器的最大分辨率的额外位。

公开(公告)号：US20140091201A1

公开(公告)日：2014-04-03

申请号：US13633017

申请日：2012-10-01

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Guangbin Zhang ,  Jiangtao Kuang

IPC: H03M1/12 ,  H01L27/146

CPC classification number: H03M1/201 ,  H03M1/123

Abstract: A random estimation analog-to-digital converter for converting a first analog signal into a digital signal includes a random bit generator, a digital-to-analog converter, a summer, an M-bit analog-to-digital converter, and a digital combiner. The random bit generator generates random least significant bits (LSBs) and the digital-to-analog converter then converts the random LSBs into a second analog signal. The summer subtracts the second analog signal from the first analog signal in the analog domain. The M-bit analog-to-digital converter then converts the modified first analog signal into the most significant bits (MSBs) of the digital image signal. The digital combiner combines the random LSBs with the MSBs in the digital domain to generate the digital signal. In one example, the random LSBs are extra bits that are beyond the maximum resolution of the M-bit analog-to-digital converter.

Abstract translation: 用于将第一模拟信号转换为数字信号的随机估计模数转换器包括随机位产生器，数 - 模转换器，加法器，M位模数转换器和数字 组合器 随机位发生器产生随机最低有效位（LSB），然后数模转换器将随机LSB转换为第二模拟信号。 夏季从模拟域中的第一个模拟信号中减去第二个模拟信号。 然后，M位模数转换器将经修改的第一模拟信号转换为数字图像信号的最高有效位（MSB）。 数字组合器将随机LSB与数字域中的MSB组合以产生数字信号。 在一个示例中，随机LSB是超出M位模数转换器的最大分辨率的额外位。

公开(公告)号：US08581760B2

公开(公告)日：2013-11-12

申请号：US13251935

申请日：2011-10-03

Applicant: Khurram Muhammad ,  Tajinder Manku ,  Semyon Lebedev

Inventor： Khurram Muhammad ,  Tajinder Manku ,  Semyon Lebedev

IPC: H03M1/12

CPC classification number: H03M1/201 ,  H03M1/685 ,  H03M1/687 ,  H03M3/30

Abstract: A digital-to-analog converter is disclosed. The converter includes a gradient correction module that generates a correction term based on a model of gradient error. The correction term is then applied to the signal path in the digital domain or applied to the output of the digital-to-analog converter in the analog domain. The model used to generate the correction term is based on a vertical gradient error in the array of current source elements, which may be modelled and calibrated using a second-order polynomial. Further, a digital-to-analog converter having a Nyquist DAC and an oversampled DAC is disclosed. When the oversampled DAC is enabled, the resolution of the Nyquist DAC may be increased while slowing the conversion rate.

Abstract translation: 公开了一种数模转换器。 该转换器包括梯度校正模块，该梯度校正模块基于梯度误差的模型产生校正项。 然后将校正项应用于数字域中的信号路径或应用于模拟域中的数模转换器的输出。 用于产生校正项的模型基于当前源元素阵列中的垂直梯度误差，其可以使用二阶多项式来建模和校准。 此外，公开了具有奈奎斯特DAC和过采样DAC的数模转换器。 当使能过采样DAC时，可能会增加奈奎斯特DAC的分辨率，同时降低转换速率。

公开(公告)号：US20120139767A1

公开(公告)日：2012-06-07

申请号：US12959317

申请日：2010-12-02

Applicant: Fredrik Larsen ,  Frode Milch Pedersen ,  Jan Rune Herheim ,  Ronan Barzic

Inventor： Fredrik Larsen ,  Frode Milch Pedersen ,  Jan Rune Herheim ,  Ronan Barzic

IPC: H03M1/00

CPC classification number: H03M1/1038 ,  H03M1/201

Abstract: A low-cost charge injection mechanism may enable oversampling to be used on low frequency signals by injecting dither noise into the ADC input. The dither noise can reduce the quantization noise allowing even direct current (DC) signals to be oversampled correctly. A low-cost charge injection mechanism can also be used to improve the ENOB by characterizing the ADC and digitally correcting the converted signal for non-linearity errors such as INL. Reducing INL errors may also allow a higher degree of oversampling to be used to further improve the ENOB.

Abstract translation: 低成本电荷注入机制可以通过将抖动噪声注入到ADC输入中来实现对低频信号的过采样。 抖动噪声可以降低量化噪声，从而允许正确的电流（DC）信号被过采样。 还可以使用低成本电荷注入机制来改善ENOB，通过对ADC进行特征化并对非线性误差（如INL）进行数字校正转换的信号。 降低INL误差还可能允许使用更高程度的过采样来进一步改善ENOB。

公开(公告)号：US5574380A

公开(公告)日：1996-11-12

申请号：US444499

申请日：1995-05-19

Applicant: Michel Dubin

Inventor： Michel Dubin

IPC: G01R15/18 ,  G01R19/00 ,  G01R21/133 ,  H03M1/20 ,  G01R27/26

CPC classification number: G01R15/18 ,  G01R21/133 ,  H03M1/201

Abstract: A current measurement circuit comprising a mutual inductance transformer 3, an integration circuit 2, and a dither circuit 1 which adds a square wave to the signal from the transformer 3 before the input of the integration circuit 2 in order that the integration circuit 2 provides a signal representing the measured current perturbed by a triangular dither signal.

Abstract translation: 一种电流测量电路，包括互感变压器3，积分电路2和抖动电路1，其在积分电路2的输入之前将来自变压器3的信号加方波，以便积分电路2提供 表示由三角形抖动信号扰动的测量电流的信号。

公开(公告)号：US11722143B2

公开(公告)日：2023-08-08

申请号：US17644589

申请日：2021-12-16

Applicant: Halo Microelectronics International

Inventor： Lijie Zhao ,  Kien Chan Vi ,  Hai Tao

IPC: H03M1/06 ,  H03M1/20 ,  H03M1/46 ,  H03M1/40

CPC classification number: H03M1/0607 ,  H03M1/201 ,  H03M1/40 ,  H03M1/46

Abstract: A method of converting an analog input signal to a digital output signal includes adding a digitally controlled offset voltage into a comparison stage of a successive approximation analog-to-digital converter circuit, wherein the digitally controlled offset voltage has a periodic pattern including at least 2(K+1) steps, each of which has a value equal to an integer multiplying 2(−K) of an analog voltage corresponding to a least significant bit (LSB) of an N-bit digital signal, operating the successive approximation analog-to-digital converter circuit to sequentially generate at least a 2(K+1) number of N-bit digital signals based on the at least 2(K+1) steps of the digitally controlled offset voltage, summing the at least the 2(K+1) number of N-bit digital signals to obtain a summing result, and dividing the summing result through a divider block to obtain a digital signal having (N+K) bits.

公开(公告)号：US09941897B1

公开(公告)日：2018-04-10

申请号：US15692812

申请日：2017-08-31

Applicant: Analog Devices Global

Inventor： Hongxing Li ,  Roberto Sergio Matteo Maurino

IPC: H03M1/66 ,  H03M1/20 ,  H03M1/06 ,  H03M1/46

CPC classification number: H03M1/201 ,  H03M1/0639 ,  H03M1/0673 ,  H03M1/462 ,  H03M1/66 ,  H03M1/68 ,  H03M3/33 ,  H03M3/42 ,  H03M3/50

Abstract: A higher accuracy ADC circuit (e.g., in which the number of bits of the ADC circuit is twelve or greater) may need calibration multiple times during its working life to avoid bit weight errors. Described are techniques to address DAC element ratio errors between DAC element clusters in a DAC circuit in order to maintain the linear performance of analog-to-digital converter (ADC) circuits and digital-to-analog converter (DAC) circuits.

公开(公告)号：US09819355B2

公开(公告)日：2017-11-14

申请号：US14897854

申请日：2014-06-11

Applicant: IEE International Electronics & Engineering S.A.

Inventor： Laurent Lamesch

IPC: H03M1/20 ,  H03C3/02 ,  H03M1/12

CPC classification number: H03M1/20 ,  H03C3/02 ,  H03M1/124 ,  H03M1/201

Abstract: A capacitive sensing system operates according to a method which uses an ADC. The analog signal to be digitized is modulated with a triangular or saw-tooth modulating signal, so that a modulated analog signal is obtained, which is sampled with the ADC. The triangular or saw-tooth signal is chosen to have a peak-to-peak amplitude corresponding at least approximately to an integer multiple L, with L≧1, of the quantization step size of the ADC. The saw-tooth or triangular signal has a number M, of periods per each sequence of N samples. M and N are chosen such that M>1 and M≠N and such that R=r*N/(k*gcd(N, M)*L), where gcd(M, N) is the greatest common divisor of N and M and where k=2 if the modulating signal is a saw-tooth signal and k=4 if the modulating signal is a triangular signal.

公开(公告)号：US09258003B2

公开(公告)日：2016-02-09

申请号：US14711200

申请日：2015-05-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Takashi Oshima ,  Tatsuji Matsuura ,  Yuichi Okuda ,  Hideo Nakane ,  Takaya Yamamoto ,  Keisuke Kimura

IPC: H03M1/00 ,  H03M1/10 ,  H03M1/12 ,  H03M1/66

CPC classification number: H03M1/1033 ,  H03M1/002 ,  H03M1/1052 ,  H03M1/12 ,  H03M1/201 ,  H03M1/44 ,  H03M1/46 ,  H03M1/66 ,  H03M1/745

Abstract: To compensate for non-linearity of an AD conversion unit and non-linearity of a DA conversion unit in an electronic system including the DA conversion unit and the AD conversion unit, an electronic system includes an A/D conversion unit, a D/A conversion unit, an AD conversion compensation unit, a DA conversion compensation unit, and a calibration unit. During a calibration operation period, the calibration unit sets an operating characteristic of the AD conversion compensation unit and an operating characteristic of the DA conversion compensation unit. The operating characteristic of the AD conversion compensation unit set during the calibration operation period compensates for non-linearity of AD conversion of the A/D conversion unit. The operating characteristic of the DA conversion compensation unit set during the calibration operation period compensates for non-linearity of DA conversion of the D/A conversion unit.