公开(公告)号：US07961203B2

公开(公告)日：2011-06-14

申请号：US11788031

申请日：2007-04-18

Applicant: Jean-Raphaël Bexal ,  Jérôme Bourgoin

Inventor： Jean-Raphaël Bexal ,  Jérôme Bourgoin

IPC: G09G5/10 ,  G09G3/28

CPC classification number: G09G3/296 ,  G09G3/293 ,  G09G2330/023

Abstract: A display screen is controlled through successive scans of the display screen. Each scan of the display screen includes a successive selection of rows of the display screen. For each row selected, and in accordance with a normal selection, a first column selection mode is implemented wherein a first selection signal is generated for the column, that first selection signal going from a first state towards a second state with an intermediate plateau level therebetween. In an alternative operation, a second column selection mode is provided which replaces the first column selection mode, the second column selection mode including the generation of a second selection signal going from the first state to the second state without any intermediate plateau level. At least at the start of each scan, the first selection mode is replaced by the second selection mode and this second selection mode is maintained for a given column, at the latest, for as long as no deselection of the column has been effected.

Abstract translation: 通过显示屏幕的连续扫描来控制显示屏幕。 显示屏幕的每次扫描包括显示屏幕的行的连续选择。 对于所选择的每一行，并且根据正常选择，实现第一列选择模式，其中为该列生成第一选择信号，该第一选择信号从第一状态朝向第二状态，其间具有中间平台级 。 在替代操作中，提供替代第一列选择模式的第二列选择模式，第二列选择模式包括从第一状态到第二状态的第二选择信号的生成而没有任何中间平台级。 至少在每次扫描开始时，第一选择模式被替换为第二选择模式，并且对于给定的列来说，这个第二选择模式是最新的，只要没有取消列选择。

公开(公告)号：US07941672B2

公开(公告)日：2011-05-10

申请号：US10268459

申请日：2002-10-10

Applicant: Luc Wuidart ,  Michel Bardouillet ,  Laurent Plaza

Inventor： Luc Wuidart ,  Michel Bardouillet ,  Laurent Plaza

IPC: G06F11/30 ,  G06F12/14

CPC classification number: G07F7/1008 ,  G06Q20/341 ,  G07F7/082 ,  H01L23/544 ,  H01L23/57 ,  H01L2223/54473 ,  H01L2924/0002 ,  H04L9/0866 ,  H01L2924/00

Abstract: A method and a circuit for generating a secret quantity based on an identifier of an integrated circuit, including combining a first digital word derived from a physical parameter network with a second word stored in a non-volatile memory element.

Abstract translation: 一种用于基于集成电路的标识符生成秘密量的方法和电路，包括组合从物理参数网络导出的第一数字字与存储在非易失性存储元件中的第二字。

公开(公告)号：US07941639B2

公开(公告)日：2011-05-10

申请号：US11481432

申请日：2006-07-05

Applicant: Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

Inventor： Yannick Teglia ,  Pierre-Yvan Liardet ,  Alain Pomet

IPC: G06F9/30

CPC classification number: G06F21/77 ,  G06F11/0757 ,  G06F21/75 ,  G06Q20/341 ,  G07F7/082 ,  G07F7/084 ,  G07F7/1008

Abstract: A method for protecting the execution of a main program against possible traps, including, on occurrence of an instruction from the main program, starting a time counter of a given count according to next instructions of the main program, and executing, once the counter has reached its count, at least one instruction of a secondary program from which the result of the main program depends.

Abstract translation: 一种用于保护主程序的执行免受可能的陷阱的方法，包括在发生来自主程序的指令时，根据主程序的下一个指令启动给定计数的时间计数器，一旦计数器具有 达到其计数，至少一个辅助程序的指令，主程序的结果从该程序所依赖。

公开(公告)号：US20110095437A1

公开(公告)日：2011-04-28

申请号：US12910229

申请日：2010-10-22

Applicant: Yacine Felk ,  Alexis Farcy

Inventor： Yacine Felk ,  Alexis Farcy

IPC: H01L23/34

CPC classification number: H01L25/0657 ,  H01L23/38 ,  H01L35/32 ,  H01L35/34 ,  H01L2224/16225 ,  H01L2225/06517

Abstract: An interface plate capable of being mounted between first and second surface-mounted electronic chips. The plate includes a plurality of first, second, and third through openings, the first openings being filled with a conductive material and being arranged to be in front of pads of the first and second chips during the assembly, the second openings being filled with a second material, the third openings being filled with a third material, the second and third materials forming two complementary components of a thermoelectric couple.

Abstract translation: 一种能够安装在第一和第二表面安装电子芯片之间的接口板。 板包括多个第一，第二和第三通孔，第一开口填充有导电材料，并且在组装过程中布置成位于第一和第二芯片的垫的前面，第二开口填充有 第二材料，第三开口填充有第三材料，第二和第三材料形成热电偶的两个互补组分。

公开(公告)号：US07927969B2

公开(公告)日：2011-04-19

申请号：US11715125

申请日：2007-03-07

Applicant: Christophe Martin

Inventor： Christophe Martin

IPC: H01L21/331 ,  H01L21/425 ,  H01L21/76

CPC classification number: G03F1/82 ,  B08B7/0071

Abstract: A method and an equipment for cleaning masks used for photolithography steps, including at least one step of thermal treatment under pumping at a pressure lower than the atmospheric pressure and at a temperature greater than the ambient temperature.

Abstract translation: 一种用于清洁用于光刻步骤的掩模的方法和设备，包括在低于大气压力的压力下以及大于环境温度的温度下进行热处理的至少一个步骤。

公开(公告)号：US20110085626A1

公开(公告)日：2011-04-14

申请号：US12902598

申请日：2010-10-12

Applicant: Pierre Busson

Inventor： Pierre Busson

IPC: H04B1/10

CPC classification number: H04B1/18 ,  H04B7/084 ,  H04H40/90

Abstract: A satellite receive unit for receiving a plurality of satellite signals from a plurality of satellites, the satellite receive unit including: a plurality of low noise blocks each for receiving one or more of the satellite signals and providing a received signal, at least one of the low noise blocks receiving a plurality of the satellite signals; and a satellite signal processing unit including a plurality of branches each arranged to receive a corresponding one of the received signals from the plurality of low noise blocks, each branch having a multiplier arranged to weight the received signal by multiplying by a corresponding coefficient; and an adder arranged to add the weighted signals of each branch to generate an output satellite signal.

Abstract translation: 一种用于从多个卫星接收多个卫星信号的卫星接收单元，所述卫星接收单元包括：多个低噪声块，每个低噪声块用于接收所述卫星信号中的一个或多个并提供接收信号，所述卫星接收单元中的至少一个 接收多个卫星信号的低噪声块; 以及卫星信号处理单元，其包括多个分支，每个分支被布置成从所述多个低噪声块接收接收到的信号中的相应一个，每个分支具有乘法器，被布置为通过乘以相应的系数来对所接收的信号进行加权; 以及加法器，其被配置为将每个分支的加权信号相加以生成输出卫星信号。

公开(公告)号：US07925119B2

公开(公告)日：2011-04-12

申请号：US12467886

申请日：2009-05-18

Applicant: Pascal Urard ,  Laurent Paumier ,  Yan Meroth

Inventor： Pascal Urard ,  Laurent Paumier ,  Yan Meroth

IPC: G06K9/32

CPC classification number: G06T1/60 ,  G09G5/391

Abstract: An image adapter transforms an input image into an output image by successively processing tiles and by changing numbers of columns and of rows of image points. The image adapter includes queue memories connected in series so as to receive values associated with the points of a tile of the input image. A module for calculating a weighted average possesses inputs connected respectively to an output of one of the memories. The module produces values sampled in a direction parallel to the columns and corresponding to the values associated with points of the input image. A sampling rate converter, connected to the output of the module, produces values associated with the points of the output image according to a sampling rate determined for a direction parallel to the rows.

Abstract translation: 图像适配器通过连续地处理图块并且通过改变图像点的列和行的数量将输入图像转换成输出图像。 图像适配器包括串联连接的队列存储器，以便接收与输入图像的图块的点相关联的值。 用于计算加权平均的模块具有分别连接到其中一个存储器的输出的输入。 该模块产生在平行于列的方向上采样的值，并对应于与输入图像的点相关联的值。 连接到模块的输出的采样率转换器根据与行平行的方向确定的采样率产生与输出图像的点相关联的值。

公开(公告)号：US07924791B2

公开(公告)日：2011-04-12

申请号：US11019436

申请日：2004-12-21

Applicant: Anca-Marina Ianos

Inventor： Anca-Marina Ianos

IPC: H04Q7/24

CPC classification number: H04W88/04 ,  H04W8/26 ,  H04W84/20

Abstract: A method of transmitting data packets within a local network including a master unit and at least two slave units is adapted to a configuration according to which the master unit comprises two processors. The first processor executes an application and the second processor controls a transmission of data between the master unit and any one of the slave units. According to the method, data packets sent by a first slave unit to a second slave unit pass through the second processor and are forwarded directly in accordance with a readdressing directive obtained from addressing elements which are interassociated and communicated by the first processor to the second processor.

Abstract translation: 在包括主单元和至少两个从单元的本地网络内传输数据分组的方法适用于主单元包括两个处理器的配置。 第一处理器执行应用，第二处理器控制主单元和任一个从单元之间的数据传输。 根据该方法，由第一从单元发送到第二从单元的数据分组通过第二处理器，并且根据从由第一处理器相互关联并传送到第二处理器的寻址元素获得的再调用指令直接转发 。

公开(公告)号：US07919864B2

公开(公告)日：2011-04-05

申请号：US10791136

申请日：2004-03-02

Applicant: Jacky Seiller ,  Jean-François Revel ,  Claude Douce

Inventor： Jacky Seiller ,  Jean-François Revel ,  Claude Douce

IPC: H01L29/40 ,  H01L21/4763

CPC classification number: H01L24/05 ,  H01L23/5227 ,  H01L23/5283 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/451 ,  H01L2224/45144 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01327 ,  H01L2924/14 ,  H01L2924/00

Abstract: An integrated circuit including one or several metallization levels, metal conductive strips and metal contact pads being formed on the last metallization level, the last level being covered with a passivation layer in which are formed openings above the contact pads. The thickness of the pads, at least at the level of their portions not covered by the passivation layer, is smaller than the thickness of said conductive strips.

Abstract translation: 包括一个或几个金属化水平的集成电路，金属导电条和金属接触焊盘在最后的金属化水平上形成，最后一个层被钝化层覆盖，其中在接触焊盘上形成开口。 至少在其未被钝化层覆盖的部分的水平面上的焊盘的厚度小于所述导电条的厚度。

公开(公告)号：US07902859B2

公开(公告)日：2011-03-08

申请号：US12579951

申请日：2009-10-15

Applicant: Nicolas Ricard ,  Laurent Jean Garcia

Inventor： Nicolas Ricard ,  Laurent Jean Garcia

IPC: H03K17/16 ,  H03K19/003

CPC classification number: G05F1/567 ,  H03F1/56

Abstract: Circuitry including an output circuit having a first variable resistance block coupled between a first supply voltage and an output node, the first variable resistance block having a plurality of selectable resistive elements coupled in series with at least one resistor between the first supply voltage and the output node, the output circuit having an output impedance determined by the resistance of the first variable resistance block; and a compensation circuit for regulating the impedance of the first variable resistance block of the output circuit, the compensation circuit having a second variable resistance block coupled between the first supply voltage and the first node of an external resistor, the second node of the external resistor being coupled to a second supply voltage, wherein the second variable resistance block comprises a plurality of selectable resistive elements coupled in series with at least one resistor between the first supply voltage and the first node of the external resistor, and wherein the plurality of selectable resistive elements of the first and second variable resistance blocks are selected based on a voltage level at the first node of the external resistor.

Abstract translation: 电路包括具有耦合在第一电源电压和输出节点之间的第一可变电阻块的输出电路，所述第一可变电阻块具有与所述第一电源电压和所述输出之间的至少一个电阻器串联耦合的多个可选择的电阻元件 所述输出电路具有由所述第一可变电阻块的电阻确定的输出阻抗; 以及用于调节输出电路的第一可变电阻块的阻抗的补偿电路，所述补偿电路具有耦合在第一电源电压和外部电阻器的第一节点之间的第二可变电阻块，外部电阻器的第二节点 耦合到第二电源电压，其中所述第二可变电阻块包括与所述第一电源电压和所述外部电阻器的所述第一节点之间的至少一个电阻器串联耦合的多个可选择的电阻元件，并且其中所述多个可选择的电阻 基于外部电阻器的第一节点处的电压电平来选择第一和第二可变电阻块的元件。