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    Frequency automatic regulation circuit of gmc filter, gm automatic regulation circuit of mutual conductance amplifier and its mos integrated circuit
    121.
    发明专利
    Frequency automatic regulation circuit of gmc filter, gm automatic regulation circuit of mutual conductance amplifier and its mos integrated circuit 审中-公开
    GMC滤波器的频率自动调节电路，双通道放大器及其MOS集成电路的通用自动调节电路

    公开(公告)号：JP2005348109A

    公开(公告)日：2005-12-15

    申请号：JP2004165637

    申请日：2004-06-03

    Applicant: Niigata Seimitsu Kk ,  Toyota Industries Corp ,  新潟精密株式会社 ,  株式会社豊田自動織機

    Inventor： AOYAMA TAKASHI ,  MIYAGI HIROSHI

    IPC: H03H11/04

    CPC classification number: H03F3/45183

    Abstract: PROBLEM TO BE SOLVED: To automatically regulate gm of a gmC filter to realize a filter with high frequency precision. SOLUTION: A frequency automatic regulation circuit 11 consists of MOS transistors Q31, Q32, MOS transistors Q33, Q34 connected between a power source Vdd and Q31, Q32, a switched capacitor circuit 13 connected with a source of Q31 and a transistor Q42 connected with the other end of the switched capacitor circuit 13 and a source of the MOS transistor Q32, etc. and control voltage VGM is provided to a gate of Q42. gm is automatically regulated to a fixed value by supplying the control voltage VGM to a current source of a mutual conductance amplifier. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：自动调节gmC滤波器的gm以实现高频精度的滤波器。 解决方案：频率自动调节电路11包括MOS晶体管Q31，Q32，连接在电源Vdd和Q31之间的MOS晶体管Q33，Q34，Q32，与Q31的源极连接的开关电容器电路13和晶体管Q42 与开关电容电路13的另一端和MOS晶体管Q32的源极连接，并且控制电压VGM被提供给Q42的栅极。 通过将控制电压VGM提供给互导放大器的电流源，gm被自动调节到固定值。 版权所有（C）2006，JPO＆NCIPI

    Arrangement wiring method of poly-phase filter and mos integrated circuit wherein poly-phase filter is formed
    122.
    发明专利
    Arrangement wiring method of poly-phase filter and mos integrated circuit wherein poly-phase filter is formed 审中-公开
    形成多相滤波器的多相滤波器和MOS集成电路的布线布线方法

    公开(公告)号：JP2005268569A

    公开(公告)日：2005-09-29

    申请号：JP2004079739

    申请日：2004-03-19

    Applicant: Niigata Seimitsu Kk ,  Toyota Industries Corp ,  新潟精密株式会社 ,  株式会社豊田自動織機

    Inventor： FURUIKE TAKESHI ,  MIYAGI HIROSHI

    IPC: H01L21/822 ,  H01L27/04 ,  H03H7/06 ,  H03H7/18 ,  H03H7/21

    Abstract: PROBLEM TO BE SOLVED: To reduce variation in characteristics of a poly-phase filter formed on an MOS integrated circuit substrate.
    SOLUTION: Four resistances R1a to R1d in the first stage of the poly-phase filter 11 are arranged close in the vertical direction of the figure. Similarly, four capacitors C1a to C1d of the first stage are also arranged close in the vertical direction. Four resistances and four capacitors of a second stage and a third stage are also arranged close each other. Consequently, it is possible to reduce variation in resistance value of each stage and variation in capacitance, thus reducing variation in frequency characteristics of the filter.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：减少在MOS集成电路基板上形成的多相滤波器的特性变化。 解决方案：多相滤波器11的第一级中的四个电阻R1a至R1d在图的垂直方向上靠近布置。 类似地，第一级的四个电容器C1a至C1d也被布置在垂直方向上。 第二级和第三级的四个电阻和四个电容器也彼此靠近地布置。 因此，可以减少各级的电阻值的变化和电容的变化，从而减小滤波器的频率特性的变化。 版权所有（C）2005，JPO＆NCIPI

    Memory module
    126.
    发明专利
    Memory module 失效
    空值

    公开(公告)号：JP3638749B2

    公开(公告)日：2005-04-13

    申请号：JP6184297

    申请日：1997-02-28

    Applicant: 新潟精密株式会社

    Inventor： 孝市 池田

    IPC: H01L25/18 ,  H01L21/60 ,  H01L25/04

    CPC classification number: H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/49 ,  H01L2224/49113 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2924/00012

    Abstract: PROBLEM TO BE SOLVED: To provide a memory module having a wiring simplified on a module board when memory chips are mounted on the board. SOLUTION: The module comprises memory bare chips mounted on a module board 2 having row of pads along its central length area and two memory bare chips 1 mounted at each side of the row of pads 4 parallel to a row of pads 3 on each memory bare chip 1. Bonding wires 5 are connected to a part of the pads 4 and the other ends of the wires 5 are connected to the pads 3 of the two bare chips disposed at both sides of the pad 4. The pads 4 may correspond commonly to different memory bare chips 1 to thereby reduce the wiring quantity in the board 2.

    Abstract translation: 要解决的问题：提供一种当存储器芯片安装在板上时具有简化为模块板的布线的存储器模块。 解决方案：该模块包括安装在模块板2上的存储器裸芯片，该模块板2具有沿其中心长度区域的一排焊盘，以及两个存储器裸芯片1，其安装在平行于每个存储器裸片上的一排焊盘3的焊盘排4的每一侧 接合线5连接到焊盘4的一部分，并且导线5的另一端连接到设置在焊盘4两侧的两个裸芯片的焊盘3.焊盘4可以共同对应于 不同的存储器裸芯片1，从而减少板2中的布线量。

    Portable watch telephone
    128.
    发明专利
    Portable watch telephone 审中-公开
    便携式手表电话

    公开(公告)号：JP2005045531A

    公开(公告)日：2005-02-17

    申请号：JP2003277513

    申请日：2003-07-22

    Applicant: Niigata Seimitsu Kk ,  新潟精密株式会社

    Inventor： IKEDA TAKESHI ,  OKAMOTO AKIRA

    IPC: H01Q3/24 ,  H01Q1/44 ,  H04B1/38 ,  H04B7/26 ,  H04M1/02 ,  H04M1/725 ,  H04W16/28 ,  H04W88/02 ,  H04Q7/32

    CPC classification number: G04G21/04 ,  H04B1/385

    Abstract: PROBLEM TO BE SOLVED: To avoid inconvenience caused by the interruption of calls due to deterioration of the receiving sensitivity without losing a feeling of wearing without increasing the size of a watch part body or a wrist band.
    SOLUTION: A plurality of flat antennas 6
    -1 , 6
    -2 are embedded in the device body part 1, a switch for switching the antenna to be used at each detection of generation of a receiving defect in an internal electronic circuit is arranged so that these antennas 6
    -1 , 6
    -2 are selectively switched to attain space diversity to be used. Even when the receiving sensitivity of one antenna is deteriorated when using it, the antenna is switched to the other antenna to obtain fine receiving sensitivity, so that the inconvenience caused by the interruption of calls can be avoided.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：为了避免由于接收灵敏度的恶化而导致的呼叫中断造成的不便，而不会增加佩戴手感而不增加手表部件主体或腕带的尺寸。 解决方案：将多个平坦天线6 SB-1，SBB-2，SBB-2，SBB-2，SBB-2，SBB， 布置内部电子电路中的接收缺陷的产生的每个检测，使得这些天线6 -1 ，6 -2 被选择性地切换以获得待使用的空间分集 。 即使在使用一个天线的接收灵敏度恶化的情况下，也可以将天线切换到另一个天线以获得良好的接收灵敏度，从而可以避免由呼叫中断引起的不便。 版权所有（C）2005，JPO＆NCIPI

    Fishing float
    130.
    实用新型
    Fishing float 失效

    公开(公告)号：JP3102424U

    公开(公告)日：2004-07-08

    申请号：JP2003273317

    申请日：2003-12-22

    Applicant: 新潟精密株式会社Niigata Seimitsu Co.,Ltd.

    Inventor： 明 岡本 ,  毅 池田

    IPC: A01K93/00 ,  A01K93/02

    Abstract: 【課題】 夜間等に釣りをする場合に、釣り人が浮きを確認し易くすると共に、かつ、釣り人に対して魚のあたりを確認し易くすることができるようにする。
    【解決手段】 浮き本体１が水面に浮かんでいる状態で、光源が縦方向の回転となるように発光部４を配置すると共に、光源の回転軸上近傍の表面に糸固定部５を設けることにより、浮きを水面に浮かべた通常状態において、光源が縦方向の回転となり、魚がかかった状態において、糸固定部５が引かれることにより浮き本体１が回転し、光源が横方向の回転となるようにして水上に対する発光状態を変化させる。
    【選択図】 図１

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