Electronic contacts and associated devices
    122.
    发明公开
    Electronic contacts and associated devices 失效
    Elektronische Kontakte undhinzugefügteSchaltungen。

    公开(公告)号:EP0143473A1

    公开(公告)日:1985-06-05

    申请号:EP84201211.4

    申请日:1984-08-22

    Abstract: High voltage electronic contacts (S, S') and associated devices including TRIMOS (MOS TRlacs) devices connected in anti-parallel fashion between two terminals (S1/S' S 2 /S' 1 ), Each electronic contact (S, S') is controlled via a control terminal (S 4 ) by two auxiliary electronic contacts (NA, NB) each able to establish a low or high impedance between the control terminal (S 4 ) and one of the two other terminals (S 1 / S' 2 , S 2 /S' 1 ), the impedance conditions of these auxiliary contacts (NA, NB) being opposed. A power protection circuit associated to the TRIMOS device allows the flow of a relatively high current through the electronic contacts (S, S') for the lower voltage range across it, and minimizes the power dissipation in the contacts in the higher voltage range, i.e. when abnormally high signals are applied to the contact.

    Abstract translation: 包括在两个端子之间以反并联方式连接的TRIMOS(MOS TRlacs)器件的高压电子触点(S,S min)和相关器件(S1 / S min 2,S2 / S min 1)。 每个电子触点(S,S min)通过控制端子(S4)由两个辅助电子触点(NA,NB)控制,每个辅助电子触点(NA,NB)能够在控制端子(S4)和另外两个之间建立低阻抗或高阻抗 端子(S1 / S min 2,S2 / S min 1),这些辅助触点(NA,NB)的阻抗条件相反。 与TRIMOS器件相关联的电源保护电路允许通过电子触点(S,S min)的相对较高的电流流过跨越其的较低电压范围,并且在更高电压范围内使触点中的功率消耗最小化,即 当异常高的信号被施加到触点时。

    Electrically conductive device
    124.
    发明公开
    Electrically conductive device 失效
    Elektrisch leitende Anordnung。

    公开(公告)号:EP0112600A2

    公开(公告)日:1984-07-04

    申请号:EP83201821.2

    申请日:1983-12-20

    CPC classification number: H01R31/00 H01R12/722

    Abstract: Electrically conductive device constituted by a male connector (1) comprising two end flanges (4, 5) and an electrically conductive bottom part (3) holding a plurality of a male contacts which are adapted to cooperate with the female contacts (12) of a female connector (8). When these connectors are interconnected the female contacts are electrically interconnected and a gap (14) between the connectors (1, 8) permits cleaning of these contacts.

    Abstract translation: 由一个阳连接器(1)构成的导电装置包括两个端部凸缘(4,5)和一个导电底部(3),该导电底部部分(3)保持多个阳性触头,这些阳性触头适于与阴型触头(12)配合 母连接器(8)。 当这些连接器互连时,阴触头电互连,并且连接器(1,8)之间的间隙(14)允许清洁这些触头。

    Pulse corrector
    125.
    发明公开
    Pulse corrector 失效
    脉冲校正器

    公开(公告)号:EP0112599A2

    公开(公告)日:1984-07-04

    申请号:EP83201818.8

    申请日:1983-12-20

    CPC classification number: H03L7/089

    Abstract: Pulse corrector, for a phase locked loop, with first (R) and second (V) outputs coupled with a digital phase detector (DPD) and with first (T) and second (S) inputs coupled with a reference source and with the output of a controlled oscillator (VCO) respectively. After the end of an interruption of the reference source, at the first input there is generated a pulse (TL) whose first edge never leads the corresponding first edge at the second output and whose duration is not substantially smaller than the duration of a pulse (S4) at the second input.

    Abstract translation: 第一(R)和第二(V)输出与数字相位检测器(DPD)耦合,第一(T)和第二(S)输入与参考源和输出端耦合的脉冲校正器 的受控振荡器(VCO)。 在参考源中断结束后,在第一个输入端产生一个脉冲(TL),该脉冲的第一个边沿在第二个输出端不会超过相应的第一个边沿,并且其持续时间基本上不会小于脉冲的持续时间( S4)在第二输入处。

    Method for modifying a multicast tree in a switching network
    126.
    发明公开
    Method for modifying a multicast tree in a switching network 失效
    维也纳Vermittlungsnetz的Methode zur Modifizierung eines Mehrfachadressenbaums

    公开(公告)号:EP0702471A1

    公开(公告)日:1996-03-20

    申请号:EP94202633.7

    申请日:1994-09-13

    Abstract: In a switching network with a plurality of inlets and outlets and a plurality of interconnected switching nodes having inputs and outputs with respective addresses, a method is described of modifying a first set of outlets to which a cell stream is routed from one of the inlets to a second set of outlets to which this cell stream is to be routed, the addresses of the outputs of each switching node from which the cell stream is output being stored in a routing table of the node. The method includes the steps of:

    transmitting a modification request message to the inlets from each outlet belonging to one but not to both sets;
    in each switching node receiving the modification request message on one of its outputs, selectively transmitting the request message to the inlets or transmitting a confirmation message to the above each outlet depending on the absence or presence in the node routing table of addresses of node outputs other than the one node output, respectively.

    Abstract translation: 在具有多个入口和出口的交换网络和具有各自地址的输入和输出的多个互连的交换节点中,描述了一种方法,其将一个单元流从一个入口路由到的第一组出口进行修改, 要将该信元流路由到的第二组出口,将从该信元流输出的每个交换节点的输出的地址存储在节点的路由表中。 该方法包括以下步骤:向属于一个而不是两个集合的每个出口的入口发送修改请求消息; 在每个交换节点在其一个输出上接收修改请求消息,根据节点输出的其他地址的节点路由表中是否存在或选择地将请求消息有选择地发送到入口或向上述每个出口发送确认消息 分别比一个节点输出。

    Rufuntervermittlungssystem für ein Mobilfunksystem mit Nachrichtenvermittlung
    127.
    发明公开
    Rufuntervermittlungssystem für ein Mobilfunksystem mit Nachrichtenvermittlung 失效
    Rufuntervermittlungssystemfürein Mobilfunksystem mit Nachrichtenvermittlung

    公开(公告)号:EP0699009A1

    公开(公告)日:1996-02-28

    申请号:EP94112793.8

    申请日:1994-08-17

    CPC classification number: H04W4/16 H04W4/14

    Abstract: Die Erfindung schlägt ein Untervermittlungssystem NSS für ein Mobilfunksystem MRS vor, bei dem ein Kommunikationsrechner COMP nach Eingang eines Rufes von einem rufenden Teilnehmer A und einem erfolglosem Vermittlungsversuch des Rufes eine Nachricht SM für den gerufenen Teilnehmer B erzeught und in einer Speichereinrichtung MEM Speichert. Ist der gerufene Teilnehmer B wieder erreichbar, sendet eine Dienstezentrale SMSC diese Nachricht an den gerufenen Teilnehmer aus. Die Nachricht SM enthält unter anderem die Teilnehmerkennung A-ID rufenden Teilnehmers A, um einen Rückruf einzuleiten.

    Abstract translation: 为具有一个或多个无线电连接点(GMSC)的移动无线电系统(MRS)提供网络子系统(NSS),用于将来自主叫用户(A)的呼叫连接到移动无线电的被叫用户(B) 系统(MRS)。 通信计算机(COMP)连接到中央连接点(SMSC)。 如果被叫用户无法到达,则计算机生成包含呼叫者的一个或多个用户标识(A-ID)的消息(SM)。 存储器(MEM)连接到计算机,用于存储被叫用户的消息(SM)。 优选地,计算机和存储器都集成在短消息服务中心(SMSC)中。 计算机和存储器(MEM)可以生成并将消息存储为短字母数字序列。

    Current control interface circuit
    128.
    发明公开
    Current control interface circuit 失效
    电流控制接口电路

    公开(公告)号:EP0695016A1

    公开(公告)日:1996-01-31

    申请号:EP94202223.7

    申请日:1994-07-29

    Inventor: Maginelle, Wim

    CPC classification number: G05F1/468 G06F13/4068 H02H9/001

    Abstract: The present invention relates to a current control interface circuit interfacing between a power supply source and a load impedance (ZL). The current control interface circuit includes a variable impedance device (VIL) controlling the current delivered by the power supply source to the load impedance. The resistance value of the variable impedance device is controlled by means of charging a capacitance (C) connected to a control terminal of the variable impedance device. According to the invention, the capacitance (C) is discharged via a controlable discharge impedance (VIC) upon detection by a voltage detection circuit (VDC) of a power supply source voltage drop. In this way, the interface circuit may still control the load current when the power supply source voltage is subsequently restored.

    Abstract translation: 本发明涉及在电源和负载阻抗(ZL)之间接口连接的电流控制接口电路。 电流控制接口电路包括控制由电源供应的电流到负载阻抗的可变阻抗器件(VIL)。 通过对连接到可变阻抗装置的控制端子的电容(C)进行充电来控制可变阻抗装置的电阻值。 根据本发明,当由电压源检测电路(VDC)检测到电源电压降时,电容(C)通过可控放电阻抗(VIC)放电。 这样,当电源电压随后恢复时,接口电路仍然可以控制负载电流。

    Impedance synthesis multiple loop using filtering means
    129.
    发明授权
    Impedance synthesis multiple loop using filtering means 失效
    Impedanz-Synthese durch vielfache Schleife,die filternde Mittel verwendet

    公开(公告)号:EP0455894B1

    公开(公告)日:1996-01-17

    申请号:EP90201196.4

    申请日:1990-05-11

    CPC classification number: H04M19/005

    Abstract: To supervise a telephone subscriber line (v'2, v'1) and provide it with adjustable AC and DC termination impedances from the exchange (v1, v2), these are supplied by an impedance synthesis multiple loop split into separate DC and AC loop parts by filters at the output of a sense amplifier in the common loop part and fed (e) through a Herter bridge. The amplifier AC output has however to be limited to avoid saturation by a larger DC signal. It now includes a Miller effect integrator output stage (A2) with a low pass frequency response supplying the DC loop and also feeding back an input stage (A1) so that the latter exhibits a high pass frequency response with a DC free output to drive the AC loop and the consequent ability to supply a larger AC output. Further circuits improve dial pulse detection (LP), reduce external capacitances (C1) and limit power consumption (PG5 and PG6).

    Abstract translation: 为了监督电话用户线路(v'2,v'1),并向交换机(v1,v2)提供可调节的交流和直流终端阻抗,它们由阻抗合成多环路分为独立的直流和交流回路 通过滤波器在公共环路部分中的读出放大器的输出处,并通过赫尔特桥馈送(e)。 然而,放大器AC输出被限制以避免较大直流信号的饱和。 它现在包括一个具有低通频率响应的米勒效应积分器输出级(A2),提供DC回路,并且还反馈输入级(A1),使得后者表现出具有DC自由输出的高通频率响应,以驱动 交流回路以及随之而来的提供较大交流输出的能力。 进一步的电路可以改善拨号脉冲检测(LP),减少外部电容(C1)并限制功耗(PG5和PG6)。

    Resequencing system
    130.
    发明公开
    Resequencing system 失效
    重测序系统

    公开(公告)号:EP0639910A1

    公开(公告)日:1995-02-22

    申请号:EP93202403.7

    申请日:1993-08-17

    Abstract: A resequencing system is used for resequencing the cells of a cell stream having different input and output peak cell rates and which is conveyed through the series connection of :

    an input circuit (IM1) controlled by a first time stamp generator (TSG1) and allocating to each cell of the cell stream an adapted time stamp value equal to the sum of a time stamp value then generated by the first time stamp generator (TSG1) and a variable virtual delay, and such that consecutive adapted time stamp values allocated to immediately consecutive cells differ by a time delay equal to at least the inverse of the output peak cell rate;
    a cell switching network (SN); and
    a resequencing unit (RSU1) associated to a second time stamp generator (TSG2) generating successive second time stamp values at a rate at least equal to the output peak cell rate, and resequencing the cells by subjecting them to an additional variable time delay which is such that the total delay of the cells is equal to the sum of the virtual delay allocated thereto and a predetermined constant value.

    Abstract translation: 重排序系统用于对具有不同输入和输出峰值信元速率的信元流的信元进行重排序,并通过以下串联连接来传送:由第一时间标记发生器(TSG1)控制的输入电路(IM1),并分配给 信元流的每个信元的适配时间标记值等于由第一时间标记发生器(TSG1)产生的时间标记值和可变虚拟延迟的和,并且使得分配给紧接着的连续信元的连续适应时间标记值 相差至少等于输出峰值信元速率的倒数的时间延迟; 一个小区交换网络(SN); 和与第二时间标记发生器(TSG2)相关联的重排序单元(RSU1),所述第二时间标记发生器(TSG2)以至少等于输出峰值单元速率的速率产生连续的第二时间标记值,并且通过使单元受到另外的可变时间延迟 使得小区的总延迟等于分配给它的虚拟延迟和预定的常数值之和。

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