公开(公告)号：US20190122947A1

公开(公告)日：2019-04-25

申请号：US15792580

申请日：2017-10-24

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L23/29 ,  H03H9/02 ,  H01L23/31 ,  H01L23/34 ,  H01L23/495 ,  H01L23/00

Abstract: An encapsulated integrated circuit is provided that includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. A phononic bandgap structure is included within the encapsulation material that is configured to have a phononic bandgap with a frequency range approximately equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating.

公开(公告)号：US20190084271A1

公开(公告)日：2019-03-21

申请号：US16195308

申请日：2018-11-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Adam Joseph Fruehling ,  Juan Alejandro Herbsommer ,  Benjamin Stassen Cook ,  Simon Joshua Jacobs

IPC: B32B7/04 ,  H04B1/38

Abstract: A method includes forming a plurality of layers of an oxide and a metal on a substrate. For example, the layers may include a metal layer sandwiched between silicon oxide layers. A non-conductive structure such as glass is then bonded to one of the oxide layers. An antenna can then be patterned on the non-conductive structure, and a cavity can be created in the substrate. Another metal layer is deposited on the surface of the cavity, and an iris is patterned in the metal layer to expose the one of the oxide layers. Another metal layer is formed on a second substrate and the two substrates are bonded together to thereby seal the cavity.

公开(公告)号：US20190081133A1

公开(公告)日：2019-03-14

申请号：US16178352

申请日：2018-11-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Barry Jon Male ,  Robert Alan Neidorff

IPC: H01L49/02 ,  H01L23/495 ,  H01L23/66

Abstract: A galvanic isolation device includes a first integrated circuit (IC) die that has communication circuitry formed in a circuit layer below the top surface. A first conductive plate is formed on the IC die proximate the top surface, and is coupled to the communication circuitry. A dielectric isolation layer is formed over a portion of the top surface of the IC after the IC is fabricated such that the dielectric isolation layer completely covers the conductive plate. A second conductive plate is juxtaposed with the first conductive plate but separated by the dielectric isolation layer such that the first conductive plate and the second conductive plate form a capacitor. The second conductive plate is configured to be coupled to a second communication circuit.

公开(公告)号：US10131115B1

公开(公告)日：2018-11-20

申请号：US15698346

申请日：2017-09-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Adam Joseph Fruehling ,  Juan Alejandro Herbsommer ,  Benjamin Stassen Cook ,  Simon Joshua Jacobs

IPC: H04M1/00 ,  B32B7/04 ,  H04B1/38 ,  G04F5/14

Abstract: A method include forming a plurality of layers of an oxide and a metal on a substrate. For example, the layers may include a metal layer sandwiched between silicon oxide layers. A non-conductive structure such as glass is then bonded to one of the oxide layers. An antenna can then be patterned on the non-conductive structure, and a cavity can be created in the substrate. Another metal layer is deposited on the surface of the cavity, and an iris is patterned in the metal layer to expose the one of the oxide layers. Another metal layer is formed on a second substrate and the two substrates are bonded together to thereby seal the cavity.

公开(公告)号：US20180304282A1

公开(公告)日：2018-10-25

申请号：US15492395

申请日：2017-04-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier ,  Stephen John Fedigan ,  David Patrick Magee

IPC: B05B5/00 ,  B05B17/06

CPC classification number: B05B5/002 ,  B05B17/0661 ,  B05B17/0669 ,  B60S1/56

Abstract: Methods and apparatus for electrostatic control of expelled material for lens cleaners are disclosed. In certain described examples, an apparatus can expel fluid by atomization from a central area of the surface using an ultrasonic transducer mechanically coupled to the surface. A first electrode can be arranged relative to the central area of the surface. A second electrode can be located in a peripheral area relative to the central area of the surface, in which a voltage can be applied between the first and second electrodes to attract atomized fluid at the peripheral area.

公开(公告)号：US20180240741A1

公开(公告)日：2018-08-23

申请号：US15913648

申请日：2018-03-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Daniel Yong Lin

IPC: H01L23/495 ,  H01L23/29 ,  H01L21/56 ,  H01L21/48 ,  H01L21/67 ,  H01L23/00

CPC classification number: H01L23/49586 ,  H01L21/4825 ,  H01L21/4857 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/67121 ,  H01L21/6715 ,  H01L23/293 ,  H01L23/49517 ,  H01L23/49558 ,  H01L23/49582 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/16245 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/183 ,  H01L2924/186 ,  H01L2924/00014 ,  H01L2224/32225 ,  H01L2924/00

Abstract: Described examples include a substrate made of a first material and having a surface. First and second nozzles respectively dispense a first solvent paste including electrically conductive nanoparticles and a second solvent paste including non-conductive nanoparticles, while moving over the surface of the substrate. The first and second nozzles additively deposit a uniform layer including sequential and contiguous zones, alternating between the first solvent paste and the second solvent paste. Energy is applied to sinter together the nanoparticles and diffuse the nanoparticles into the substrate. The sintered nanoparticles form a layer composed of an alternating sequence of electrically conductive zones contiguous with electrically non-conductive zones.

公开(公告)号：US10032850B2

公开(公告)日：2018-07-24

申请号：US15152518

申请日：2016-05-11

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Roberto Giampiero Massolini ,  Daniel Carothers

IPC: H01L21/00 ,  H01L49/02 ,  H01L21/3065 ,  H01L21/768 ,  H01L23/495 ,  H01L23/498

Abstract: An integrated circuit (IC) that includes a circuit substrate having a front side surface and an opposite back side surface. Active circuitry is located on the front side surface. An inductive structure is located within a deep trench formed in the circuit substrate below the backside surface. The inductive structure is coupled to the active circuitry.

公开(公告)号：US20180190556A1

公开(公告)日：2018-07-05

申请号：US15396121

申请日：2016-12-30

Applicant: Texas Instruments Incorporated

Inventor： Barry Jon Male ,  Steve Kummerl ,  Robert Alan Neidorff ,  Benjamin Stassen Cook

IPC: H01L23/31 ,  H02H9/04 ,  H01L23/495 ,  H01L27/02 ,  H01L21/48 ,  H01L21/56

Abstract: In a described example, an apparatus includes: an integrated circuit die having multiple terminals; a leadframe having leads for external connections, at least some of the leads electrically coupled to at least one of the multiple terminals of the integrated circuit die; a first electrode having a first end portion; a second electrode having a second end portion positioned proximal to and spaced apart from the first end portion of the first electrode, the first end portion and the second end portion spaced by a spark gap; encapsulation material surrounding the integrated circuit die to form a packaged integrated circuit having a cavity surrounding the first end portion, the second end portion, and the spark gap so that the first end portion of the first electrode, the second end portion of the second electrode and the spark gap are spaced from the encapsulation material.

公开(公告)号：US20180151487A1

公开(公告)日：2018-05-31

申请号：US15361401

申请日：2016-11-26

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Benjamin Stassen Cook ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L23/367 ,  H01L23/373 ,  H01L23/31 ,  H01L23/48 ,  H01L21/768 ,  H01L21/3205 ,  H01L21/288 ,  H01L21/285 ,  H01L21/324 ,  H01L21/3105

CPC classification number: H01L23/528 ,  H01L21/28556 ,  H01L21/288 ,  H01L21/32051 ,  H01L21/32055 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76895 ,  H01L23/3107 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/53209 ,  H01L23/53276

Abstract: An integrated circuit has a substrate and an interconnect region disposed on the substrate. The interconnect region includes a plurality of interconnect levels. Each interconnect level includes interconnects in dielectric material. The integrated circuit includes a graphitic via in the interconnect region. The graphitic via vertically connects a first interconnect in a first interconnect level to a second interconnect in a second, higher, interconnect level. The graphitic via includes a cohered nanoparticle film of nanoparticles in which adjacent nanoparticles cohere to each other, and a layer of graphitic material disposed on the cohered nanoparticle film. The nanoparticles include one or more metals suitable for catalysis of the graphitic material. The cohered nanoparticle film is formed by a method which includes an additive process. The graphitic via is electrically coupled to an active component of the integrated circuit.

公开(公告)号：US09941194B1

公开(公告)日：2018-04-10

申请号：US15437580

申请日：2017-02-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Daniel Yong Lin

IPC: H01L21/00 ,  H01L23/495 ,  H01L23/00 ,  H01L21/67 ,  H01L21/48 ,  H01L21/56 ,  H01L23/29

CPC classification number: H01L23/49586 ,  H01L21/4825 ,  H01L21/4857 ,  H01L21/4867 ,  H01L21/56 ,  H01L21/67121 ,  H01L21/6715 ,  H01L23/293 ,  H01L23/49517 ,  H01L23/49558 ,  H01L23/49582 ,  H01L24/48 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48465 ,  H01L2924/183 ,  H01L2924/186

Abstract: In an embodiment, a substrate made of a first material and having a surface is provided. A first and second nozzle dispense a first solvent paste including electrically conductive nanoparticles and a second solvent paste including non-conductive nanoparticles respectively while moving over the surface of the substrate. The first and second nozzles additively deposit a uniform layer comprising sequential and contiguous zones alternating between the first solvent paste and the second solvent paste. Energy is applied to the nanoparticles to sinter together the nanoparticles and diffuse the nanoparticles into the substrate. The sintered nanoparticles form a layer composed of an alternating sequence of electrically conductive zones contiguous with electrically non-conductive zones.