Cutting improvement structure for a drill
    141.
    发明申请
    Cutting improvement structure for a drill 审中-公开
    钻削切割改进结构

    公开(公告)号:US20060078393A1

    公开(公告)日:2006-04-13

    申请号:US11154723

    申请日:2005-06-17

    Applicant: Chi-Chin Lin

    Inventor: Chi-Chin Lin

    Abstract: This invention relates to a drill having hole-drilling alignment precision, and drilling capability, and scrap-release capability. It comprises a drill tip on the cutting part and a drill body with at least two radially reverse screw slots, the drill body comprises an extended clamp part; the drill tip having two more pointed and symmetrical surfaces of pointed, conical, cylindrical shape on the front surface and wedge shape cone on the side surface, the central drilling point on the drill tip of the two symmetrical surfaces forms a point, one side of the symmetrical surface is a cone surface; another side is a scrape surface having an outer side of the front end larger than the drill body, the blade end is installed at the outer side of the scrape surface; a scrap-release slope installed in between the scrape surface and the drill tip to enhance the above mentioned capabilities.

    Abstract translation: 该结构具有切割部分的钻头(21)和具有两个径向反向螺旋槽的钻体(22),其中主体具有延伸夹具。 叶片端部(24)安装在刮擦表面(23)的外侧,刮刀表面的底部和钻头主体的一端形成一个倒钩。 废料释放斜面(25)安装在刮刀表面和钻头之间。

    DC/DC converter
    142.
    发明申请
    DC/DC converter 审中-公开
    DC / DC转换器

    公开(公告)号:US20060012357A1

    公开(公告)日:2006-01-19

    申请号:US10892054

    申请日:2004-07-14

    CPC classification number: H02M3/073 H02M1/36 H02M2001/0041

    Abstract: A DC/DC converter. In the DC/DC converter, a DC/DC conversion circuit provides an output voltage to a storage capacitor upon receiving an enable signal. First and second resistors are connected in series to produce a first voltage according to the output voltage. A Schmitt trigger is coupled to the first voltage to output a first control signal through an inverter when the first voltage is smaller than a second voltage and to output a second control signal through the inverter when the first voltage is higher than a third voltage. An oscillator is turned off upon receiving the first control signal such that the DC/DC conversion circuit stops providing the output voltage, and is turned on and outputs the enable signal upon receiving the second control signal such that the DC/DC conversion circuit provides the output voltage to the storage capacitor.

    Abstract translation: DC / DC转换器。 在DC / DC转换器中,DC / DC转换电路在接收到使能信号时向存储电容器提供输出电压。 第一和第二电阻串联连接以产生根据输出电压的第一电压。 当第一电压小于第二电压时,施密特触发器耦合到第一电压,以通过反相器输出第一控制信号,并且当第一电压高于第三电压时通过反相器输出第二控制信号。 在接收到第一控制信号时,振荡器关闭,使得DC / DC转换电路停止提供输出电压,并且在接收到第二控制信号时导通并输出使能信号,使得DC / DC转换电路提供 输出电压到存储电容。

    Reference generator for multilevel nonlinear resistivity memory storage elements
    143.
    发明授权
    Reference generator for multilevel nonlinear resistivity memory storage elements 失效
    多电平非线性电阻率存储元件的参考发生器

    公开(公告)号:US06985383B2

    公开(公告)日:2006-01-10

    申请号:US10689421

    申请日:2003-10-20

    Abstract: A multilevel reference generator has a plurality of nonlinear standard resistive elements where each resistive element is biased at a constant level to develop a resultant level. The multilevel reference generator has a plurality of mirror sources. Each mirror source is in communication with the one of the plurality of resistive elements such that each mirror source receives the resultant level from the one standard resistive element and provides a mirrored replication of the resultant level. The multilevel reference generator has a plurality of reference level combining circuits. The reference level combining circuit includes a resultant level summing circuit that additively combines the first and second mirrored replication level and a level scaling circuit to create a scaling of the combined first and second mirrored replication levels to create the reference level.

    Abstract translation: 多电平参考发生器具有多个非线性标准电阻元件,其中每个电阻元件被偏置在恒定电平以产生合成电平。 多电平参考发生器具有多个镜源。 每个反射镜源与多个电阻元件中的一个电阻元件相通,使得每个反射镜源从一个标准电阻元件接收合成电平,并提供所得电平的镜像复制。 多电平参考发生器具有多个参考电平组合电路。 参考电平组合电路包括相加地组合第一和第二镜像复制级别的电平求和电路和级别缩放电路,以创建组合的第一和第二镜像复制级别的缩放以创建参考电平。

    Low leakage current static random access memory
    144.
    发明授权
    Low leakage current static random access memory 失效
    低泄漏电流静态随机存取存储器

    公开(公告)号:US06970374B2

    公开(公告)日:2005-11-29

    申请号:US10708328

    申请日:2004-02-24

    Applicant: Shih-Chin Lin

    Inventor: Shih-Chin Lin

    CPC classification number: G11C11/412

    Abstract: A static random access memory (SRAM) has a plurality of SRAM cells, a first switch unit, a second switch unit, and a capacitor. During read/write operations of the SRAM cells, the first switch unit and the second switch unit are turned on so that two power terminals of the SRAM cells respectively electrically connect to VDD and VSS and that the capacitor electrically connects between VDD and VSS. When the SRAM cells are not accessed, the first switch unit and the second switch unit are turned off and the capacitor keeps a voltage gap between the two power terminals of the SRAM cells greater than a predetermined value.

    Abstract translation: 静态随机存取存储器(SRAM)具有多个SRAM单元,第一开关单元,第二开关单元和电容器。 在SRAM单元的读/写操作期间,第一开关单元和第二开关单元导通,使得SRAM单元的两个电源端子分别电连接到V DD和V SS 并且电容器在V DD和V SS之间电连接。 当SRAM单元未被访问时,第一开关单元和第二开关单元断开,并且电容器保持SRAM单元的两个电源端子之间的电压间隙大于预定值。

    Excrement container
    145.
    发明授权
    Excrement container 失效
    排泄容器

    公开(公告)号:US06964247B1

    公开(公告)日:2005-11-15

    申请号:US10892252

    申请日:2004-07-16

    Applicant: Hsun-Chin Lin

    Inventor: Hsun-Chin Lin

    Abstract: An excrement includes a hollow box body having an opening for covering a cover body thereon. The box body and the cover body are connected to a hanging body. A first inner cup and a second inner cup are contained in the box body. The second inner cup is inserted and disposed into the first inner cup. Each inner cup is in a box shape, which can be flattened into a thin flat sheet. The storage space required for the inner cups is thus reduced. In addition, the accessibility and the portability of the inner cups are also enhanced. Therefore, whenever bringing a pet outdoors, one can easily clean up the excrement of the pet by employing the excrement container of the present invention.

    Abstract translation: 排泄物包括具有用于覆盖盖体的开口的中空箱体。 箱体和盖体连接到悬挂体。 第一内杯和第二内杯容纳在箱体中。 第二内杯插入并设置在第一内杯中。 每个内杯都是一个盒子形状,它可以被压平成一个薄的平板。 因此,内杯所需的储存空间减少。 此外,内杯的可达性和便携性也得到提高。 因此,每当在户外带宠物时,可以通过使用本发明的排泄容器来容易地清理宠物的粪便。

    VOLTAGE GENERATING APPARATUS WITH A FINE-TUNE CURRENT MODULE
    147.
    发明申请
    VOLTAGE GENERATING APPARATUS WITH A FINE-TUNE CURRENT MODULE 有权
    具有微调电流模块的电压发生装置

    公开(公告)号:US20050248330A1

    公开(公告)日:2005-11-10

    申请号:US10709470

    申请日:2004-05-07

    CPC classification number: G05F3/262 G05F3/30 Y10S323/907

    Abstract: Voltage generating apparatus includes a positive temperature coefficient current generating module, a negative temperature coefficient current generating module, a fine-tune current module and a voltage output module. The function of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, which take advantage of characteristics of MOS devices operated in the sub-threshold region, is to generate a stable current of positive temperature coefficient and a stable current of negative temperature coefficient, respectively. The current fine-tune module increases or decreases output current of the negative temperature coefficient current generating module. The voltage output module sums two output currents of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module and transforms the total current into output voltage that is stable under temperature and process variation.

    Abstract translation: 电压产生装置包括正温度系数电流产生模块,负温度系数电流产生模块,微调电流模块和电压输出模块。 利用在亚阈值区域工作的MOS器件的特性的正温度系数电流发生模块和负温度系数电流发生模块的功能是产生正温度系数和稳定电流的稳定电流 负温度系数。 当前微调模块增加或减少负温度系数电流发生模块的输出电流。 电压输出模块将正温度系数电流发生模块和负温度系数电流发生模块的两个输出电流相加,并将总电流转换为在温度和工艺变化下稳定的输出电压。

    Paper tray and method for using the same
    148.
    发明申请
    Paper tray and method for using the same 失效
    纸盘及其使用方法

    公开(公告)号:US20050230903A1

    公开(公告)日:2005-10-20

    申请号:US11089313

    申请日:2005-03-24

    Applicant: Nien-Chin Lin

    Inventor: Nien-Chin Lin

    CPC classification number: B65H1/04 B41J13/103 G03G15/6502 G03G2215/00388

    Abstract: A paper tray for use with a printer. The paper tray includes a sidewall, a door plate, a rotating member and a resilient element. The sidewall has a through hole. The door plate pivots on the sidewall and rotates around an X-axis. The rotating member is disposed in the through hole and pivots on the sidewall. The rotating member has an engagement portion and selectively rotates between a first position and a second position around a Y-axis. The resilient element is disposed between the rotating member and the sidewall, providing resilience to the rotating member to rotate to the first position. The rotating member rotates to the second position when exerted to overcome the resilience. The rotating member rotates to the first position by the resilience in the absence of external pressure, such that the engagement portion abuts the door plate.

    Abstract translation: 用于打印机的纸盘。 纸盘包括侧壁,门板,旋转构件和弹性元件。 侧壁具有通孔。 门板在侧壁上枢转并围绕X轴旋转。 旋转构件设置在通孔中并且在侧壁上枢转。 旋转构件具有接合部分,并且围绕Y轴在第一位置和第二位置之间选择性地旋转。 弹性元件设置在旋转构件和侧壁之间,为旋转构件提供弹性以旋转到第一位置。 旋转构件当施加以旋转到第二位置以克服弹性时。 旋转构件在没有外部压力的情况下通过弹性旋转到第一位置,使得接合部邻接门板。

    High-speed serial link clock and data recovery
    149.
    发明申请
    High-speed serial link clock and data recovery 失效
    高速串行链路时钟和数据恢复

    公开(公告)号:US20050207520A1

    公开(公告)日:2005-09-22

    申请号:US10800653

    申请日:2004-03-16

    CPC classification number: H04L7/0338 H04L7/005

    Abstract: A system for clock and data recovery (“CDR”) includes a clock generator, a half-rate phase detector for receiving the input data, an encoder, a phase selector outputting recovered clock, a confidence counter, and a multiplexer outputting recovered data. The clock generator generates an 8-phase clock signal at half a rate of the transmitted serial data. The phase detector samples input data at four times the standard sampling rate, takes the oversampled data and detects phase transitions therein, i.e., phase lead and lag. The encoder encodes the phase transition data. The confidence counter receives the phase transition data and generates a signal representing the accumulated net effect of the phase transitions. The phase selector receives the confidence counter signal and the 8-phase clock from the clock generator, and determines the optimum phase for data sampling.

    Abstract translation: 时钟和数据恢复系统(“CDR”)包括时钟发生器,用于接收输入数据的半速率相位检测器,编码器,输出恢复时钟的相位选择器,置信计数器和输出恢复数据的多路复用器。 时钟发生器以传输的串行数据的一半速率产生8相时钟信号。 相位检测器以标准采样速率的四倍采样输入数据,采用过采样数据并检测其中的相位变化,即相位超前和滞后。 编码器对相变数据进行编码。 置信计数器接收相变数据,并产生表示相变的累积净效应的信号。 相位选择器从时钟发生器接收置信计数器信号和8相时钟,并确定数据采样的最佳相位。

    Interdigitated capacitor and method for fabrication therof
    150.
    发明申请
    Interdigitated capacitor and method for fabrication therof 有权
    交叉电容器及其制造方法

    公开(公告)号:US20050206469A1

    公开(公告)日:2005-09-22

    申请号:US10804899

    申请日:2004-03-19

    CPC classification number: H01L23/5223 H01L2924/0002 H01L2924/00

    Abstract: A capacitor for use within a microelectronic product employs a first capacitor plate layer that includes a first series of horizontally separated and interconnected tines. A capacitor dielectric layer separates the first capacitor plate layer from a second capacitor plate layer. The second capacitor plate layer includes a second series of horizontally separated and interconnected tines horizontally interdigitated with the first series of horizontally separated and interconnected tines. The capacitor is formed employing a self-aligned method and the capacitor dielectric layer is formed in a serpentine shape.

    Abstract translation: 在微电子产品中使用的电容器采用第一电容器板层,其包括第一系列水平分离和互连的尖齿。 电容器电介质层将第一电容器板层与第二电容器板层分开。 第二电容器板层包括与第一系列水平分离和互相联接的齿水平地交叉指向的第二系列水平分离和互连的齿。 使用自对准方法形成电容器,并且电容器介电层形成为蛇形形状。

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