公开(公告)号：JPH0794390A

公开(公告)日：1995-04-07

申请号：JP23472193

申请日：1993-09-21

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: G03F9/00 ,  G03F7/20 ,  H01L21/027

Abstract: PURPOSE:To provide a semiconductor eligner which satisfies the fineness of machining dimensions, at the same time simplifies an optical system including alignment, and performs a stable and accurate overlapping. CONSTITUTION:Laser beams with each different wavelength generated by first and second resonators from an ultraviolet laser light source irradiation part 10 are applied onto a wafer 14 via a coaxial optical system consisting of integrator 11, a reticle 12. and a demagnification projection lens 13 and an XY stage 15 is controlled by a stable position detection by comparison of on-axis and off-axis by an aligner 16 without attenuating the reflection light from the mark on the wafer 14 using laser beams from the first resonator as a light source for alignment.

公开(公告)号：JPH0730114A

公开(公告)日：1995-01-31

申请号：JP19412093

申请日：1993-07-09

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: H01L21/26 ,  H01L21/316 ,  H01L21/336 ,  H01L29/78

Abstract: PURPOSE:To improve just electric current drive characteristics without changing other characteristics. CONSTITUTION:After growing a gate oxide film 16 on a semiconductor substrate 11, an infrared-ray lamp annealing by infrared-ray 17 irradiation is performed for the gate oxide film 16 in a nitrogen atmosphere. With this, film quality of the gate oxide film 16 is improved and interface condition between the gate oxide film 16 and the semiconductor substrate 11 is improved as well. Further, by the infrared-ray lamp annealing, high temperature annealing is performed in a short time, so the impurities forming a well 15 actually do not re-diffuse.

公开(公告)号：JPH0730113A

公开(公告)日：1995-01-31

申请号：JP19411893

申请日：1993-07-09

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: H01L21/316 ,  H01L21/336 ,  H01L29/78

Abstract: PURPOSE:To raise reliability by improving withstand voltage characteristics of a gate oxide film at a border part between a side-end part of a gate electrode and a semiconductor substrate as well as hot-carrier resistivity. CONSTITUTION:After forming a gate electrode 13, oxidation-nitriding is performed in a furnace containing an atmosphere whose main component is N2O. As a result, film quality of a gate oxide film 12 is improved and it becomes thicker, for improved withstand voltage. Further, a nitrogen is contained near the interface 19 between the gate oxide film 12 and a semiconductor substrate 11, and the nitrogen suppresses hot carries from being injected chiefly from a high electric field area near the drain of the semiconductor substrate 11 to the gate oxide film 12, so that hot carrier resistivity improves.

公开(公告)号：JPH0621397A

公开(公告)日：1994-01-28

申请号：JP19486492

申请日：1992-06-29

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: H01L27/11 ,  H01L21/8244 ,  H01L29/78 ,  H01L29/786 ,  H01L29/784

Abstract: PURPOSE:To provide SRAM memory cells having a much smaller cell area and a manufacturing method for the SRAM memory cells, by solving the problem of the limitation of lithography on cell area reduction for patterns, concerning to SRAM memory cells having word lines in the center parts. CONSTITUTION:Concerning to an SRAM memory cell having a word line 1 in the center, element isolating and insulating parts 3a and 3b and side walls 4a and 4b are formed between the word line 1 and the gates 2a and 2b of driver transistors, and the memory nodes of the memory cell are connected by conductive materials formed on exposed parts of source and drain diffusion regions regulated by the said element isolating and insulating parts and side walls, and on the gates of the driver transistors. In this way, the title SRAM memory cell is manufactured.

公开(公告)号：JPH05326888A

公开(公告)日：1993-12-10

申请号：JP14843792

申请日：1992-05-15

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: H01L27/11 ,  H01L21/8244 ,  H01L29/78 ,  H01L29/786 ,  H01L29/784

Abstract: PURPOSE:To provide a method of manufacturing a semiconductor device and an SRAM high in yield, where manufacturing processes and especially contact forming processes are lessened in number. CONSTITUTION:A semiconductor device is equipped with an upper transistor and a lower transistor, where a three-layered laminate composed of layers provided with diffusion regions 1 to 4 which form the transistors is provided, and the semiconductor device such as a TFT load-type SRAM or the like is so constituted as to make the laminate concerned serve as a contact area 5.

公开(公告)号：JPH0582637A

公开(公告)日：1993-04-02

申请号：JP17058391

申请日：1991-06-15

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: H01L21/76 ,  H01L21/316 ,  H01L21/8234 ,  H01L27/06

Abstract: PURPOSE:To prevent a deterioration in separation through effective control over configuration between regions, by providing an adjacent-region separating region as a space between two regions, i.e., a region, in which devices are separated with only trench isolation and a region, in which devices are separated with selective oxidation. CONSTITUTION:An adjacent-region separating region with a length of several mum is formed between two regions, i.e., a region, in which devices are separated with only trench isolation and a region, in which devices are separated with selective oxidation. By this means, there is no fear of an abrupt step that is formed when a recessed part as a trench 4, and a projecting part as a selective oxide film 7 are made close to each other. Then, the configuration control can be improved, and friction between the trench 4 and selective oxide film 7 is prevented so that the regions can be completely separated. Consequently, the separation between regions can be enhanced sufficiently.

公开(公告)号：JPS62264052A

公开(公告)日：1987-11-17

申请号：JP10737686

申请日：1986-05-10

Applicant: SONY CORP

Inventor： TAKEDA MINORU

IPC: G03F1/00 ,  G03F1/36 ,  G03F1/68 ,  H01L21/027

Abstract: PURPOSE:To form a polygonal pattern like a square without hindrance by forming a polygonal pattern forming part with plural aperture parts which are radially extended from the center toward corner parts. CONSTITUTION:A light shielding film 3 consisting of chromium or the like is selectively formed on the surface of a transparent plate 2 to obtain a mask 1 for exposure, and a pattern for exposure is formed with parts where the light shielding film 3 is not formed. In case of forming a minute polygonal pattern approximating the limit of resolving power, the great influence of the diffraction phenomenon of light is used and a pattern forming part 4 is formed with plural aperture parts 5 radially extended to the corner parts of the polygon. When exposure is performed with the mask 1, isometric lines of luminous intensity of the light passing the pattern forming part 4 have a polygonal luminous intensity distribution by diffraction, and a minute polygonal pattern is accurately formed.