公开(公告)号：US20180293106A1

公开(公告)日：2018-10-11

申请号：US15865114

申请日：2018-01-08

Applicant: INTEL CORPORATION

Inventor： Michael Apodaca

IPC: G06F9/50 ,  G06F12/1009 ,  G09G5/39

CPC classification number: G06F9/5016 ,  G06F9/5044 ,  G06F12/1009 ,  G09G5/39 ,  Y02B70/16 ,  Y02D10/22

Abstract: Various embodiments are presented herein that may allow an application direct access to graphical processing unit memory. An apparatus and a computer-implemented method may include accessing allocated graphical processing unit memory of a second resource via a link from a first resource. The allocated graphical processing unit memory may be mapped into one or more page tables of a central processing unit. A virtual address of the graphical processing unit memory from the one or more page tables of the central processing unit may be sent to the application.

公开(公告)号：US20180286115A1

公开(公告)日：2018-10-04

申请号：US15477016

申请日：2017-04-01

Applicant: Intel Corporation

Inventor： Prasoonkumar Surti ,  Karthik Vaidyanathan ,  Murali Ramadoss ,  Michael Apodaca ,  Abhishek Venkatesh ,  Devan Burke ,  Philip R. Laws ,  Subramaniam Maiyuran ,  Abhishek R. Appu ,  ElMoustapha Ould-Ahmed-Vall ,  Peter L. Doyle

IPC: G06T15/80 ,  G06T5/20 ,  G06F9/50 ,  G06T1/20

CPC classification number: G06T15/80 ,  G06F9/50 ,  G06F9/5011 ,  G06T1/20 ,  G06T5/20

Abstract: An embodiment of a conditional shader apparatus may include a conditional pixel shader to determine if one or more pixels meet a shader condition, and a pixel regrouper communicatively coupled to the conditional pixel shader to regroup pixels based on whether the one or more pixels are determined to meet the shader condition. Another embodiment of a conditional shader apparatus may include a thread analyzer to determine if a set of threads meet a thread condition, and a conditional kernel loader communicatively coupled to the thread analyzer to load an appropriate kernel from a set of two or more kernels based on whether the set of threads are determined to meet the thread condition. Other embodiments are disclosed and claimed.

公开(公告)号：US20180121368A1

公开(公告)日：2018-05-03

申请号：US15337128

申请日：2016-10-28

Applicant: Intel Corporation

Inventor： Michael Apodaca

IPC: G06F12/126

CPC classification number: G06F12/126 ,  G06F3/048 ,  G06F12/0875 ,  G06F12/0891 ,  G06F12/12 ,  G06F2212/1021 ,  G06F2212/302 ,  G06F2212/455 ,  G06F2212/608 ,  G06F2212/7203 ,  G06T2200/28 ,  G06T2207/20021

Abstract: Briefly, in accordance with one or more embodiments, an apparatus comprises a processor to build a command buffer without knowledge whether the contents of a cache will be discarded, and a memory to store the command buffer. The processor is to determine a discard state of the cache prior to executing the command buffer, execute the command buffer, and discard or keep the contents of the cache according to the discard state.

公开(公告)号：US09881352B2

公开(公告)日：2018-01-30

申请号：US14941110

申请日：2015-11-13

Applicant: INTEL CORPORATION

Inventor： Michael Apodaca ,  Siddharth Y. Dharmadhikari

IPC: G06F9/46 ,  G06T1/20 ,  G06F9/00 ,  G09G5/36

CPC classification number: G06T1/20 ,  G06F9/00 ,  G06F9/30149 ,  G06F9/3877 ,  G09G5/363

Abstract: A mechanism is described for facilitating efficient processing of graphics commands at computing devices. A method of embodiments, as described herein, includes detecting a current object representing a bundled state of graphics commands in a command list to be processed at a graphics processor of a computing device, and evaluating the current object to determine a previous object bound to a first set of the graphics commands, where the first set of the graphics commands is associated with a first command state corresponding to the previous object. The method may further include copying a second set of the graphics commands to a command buffer associated with the command list, where the second set of the graphics commands represents a remainder of the graphics commands in the command list upon excluding the first set of the graphics commands. The method may further include facilitating the graphics processor to execute the second set of the graphics commands from the command buffer.