Abstract:
A semiconductor structure (1) comprises a processed semiconductor substrate (2) including active electronic components (3); a dielectric layer (4) covering at least partially the processed semiconductor substrate (2, 3); an interface layer (5) which is suitable for growing optically active material on the interface layer, wherein the interface layer (5) is bonded to the dielectric layer (4); wherein the optical gain layer (5) and the processed semiconductor substrate (2, 3) are connected through the dielectric layer (4) by electric and/or optical contacts (6). A method for fabricating a semiconductor structure (1) comprises: providing (S1) a processed semiconductor substrate (2) including active electronic components (3); depositing (S2) a dielectric layer (4) covering at least partially the processed semiconductor substrate (2, 3); bonding (S4) an interface layer (5) to the dielectric layer (4), wherein the interface layer (5) is suitable for growing optically active material on the interface layer; and connecting (S7) the interface layer (5) and the processed semiconductor substrate (2, 3) with each other through the dielectric layer (4) by electric and/or optical contacts (6).
Abstract:
Identifying whether a first application is malicious. The first application can be presented for installation on a processing system. The first application can be scanned, via a static analysis implemented by a processor, to determine whether a user interface layout of the first application is suspiciously similar to a user interface layout of a second application installed on the processing system. When the user interface layout of the first application is suspiciously similar to the user interface layout of the second application installed on the processing system, an alert can be generated indicating that the first application is malicious.
Abstract:
A computer system for optimizing instructions is configured to identify two or more machine instructions as being eligible for optimization, to merge the two or more machine instructions into a single optimized internal instruction that is configured to perform functions of the two or more machine instructions, and to execute the single optimized internal instruction to perform the functions of the two or more machine instructions. Being eligible includes determining that the two or more machine instructions include a first instruction specifying a first target register and a second instruction specifying the first target register as a source register and a target register. The second instruction is a next sequential instruction of the first instruction in program order, wherein the first instruction specifies a first function to be performed, and the second instruction specifies a second function to be performed.
Abstract:
A distributed fabric system has distributed line card (DLC) chassis and scaled-out fabric coupler (SFC) chassis. Each DLC chassis includes a network processor and fabric ports. Each network processor of each DLC chassis includes a fabric interface in communication with the DLC fabric ports of that DLC chassis. Each SFC chassis includes a fabric element and fabric ports. A communication link connects each SFC fabric port to one DLC fabric port. Each communication link includes cell-carrying lanes. Each fabric element of each SFC chassis collects per-lane statistics for each SFC fabric port of that SFC chassis. Each SFC chassis includes program code that obtains the per-lane statistics collected by the fabric element chip of that SFC chassis. A network element includes program code that gathers the per-lane statistics collected by each fabric element of each SFC chassis and integrates the statistics into a topology of the entire distributed fabric system.
Abstract:
Various embodiments of accidental shared volume erasure prevention include systems, methods, and/or computer program products for receiving a request to access a volume from a requesting system, determining whether the volume is associated with any system other than the requesting system, and preventing accidental erasure of the volume based on the determination.
Abstract:
In one general embodiment, an apparatus includes at least two modules, each of the modules having an array of transducers, wherein the at least two modules are fixed relative to each other, wherein an axis of each array is defined between opposite ends thereof, wherein the axes of the arrays are oriented about parallel to each other, wherein the array of a first of the modules is offset from the array of a second of the modules in a first direction parallel to the axis of the array of the second module such that the transducers of the first module are about aligned with the transducers of the second module in an intended direction of tape travel thereacross; and a mechanism for orienting the modules about an axis orthogonal to the plane in which the arrays reside to control a transducer pitch presented to a tape.
Abstract:
A Vector Generate Mask instruction. For each element in the first operand, a bit mask is generated. The mask includes bits set to a selected value starting at a position specified by a first field of the instruction and ending at a position specified by a second field of the instruction.
Abstract:
A method for provisioning IT resources includes receiving a signal from an e-book reading device indicating that a user of the e-book reading device is approaching a practical procedure section within an e-book being read by the user on the e-book reading device. The practical procedure section includes an exercise to be performed by the user pertaining to the subject matter of the e-book. What IT resources are needed for the user to perform the exercise are determined. The needed IT resources are provisioned such that the IT resources that the needed IT resources are available when the user is ready to perform the exercise.
Abstract:
Disclosed is a data center system comprising a cold aisle (40) comprising a first perforated floor element (22); a hot aisle (50) comprising a second perforated floor element (24) and a ceiling element (32) that each can be opened and closed; a server rack (60) comprising a plurality of servers (62) separating the cold aisle from the hot aisle; an air conditioning unit (70) having an input coupled to the hot aisle via the ceiling element and an output coupled to the cold aisle via the first perforated floor element; and a controller (64, 90) arranged to toggle between a first configuration in which the ceiling element is opened and the second perforated floor element is closed; and a second configuration in which the ceiling element is closed and the second perforated floor element is opened. A server rack for such a data center system and a method of controlling the temperature in such a data center system are also disclosed.
Abstract:
Systems and methods for estimating bandwidth. A first probe flow is sent into cellular traffic, and a first bandwidth quantity achieved by the first probe flow is measured. A second probe flow is sent into the cellular traffic, and a second bandwidth quantity achieved by the first probe flow while the second probe flow is in the cellular traffic is measured. The first bandwidth quantity and the second bandwidth quantity are compared, and at least one result from the comparing is determined.