MICROELECTRONIC DEVICE SUBSTRATE FORMED BY ADDITIVE PROCESS

    公开(公告)号:US20200176251A1

    公开(公告)日:2020-06-04

    申请号:US16206050

    申请日:2018-11-30

    Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

    Hermetically sealed molecular spectroscopy cell with buried ground plane

    公开(公告)号:US10424523B2

    公开(公告)日:2019-09-24

    申请号:US15697505

    申请日:2017-09-07

    Abstract: A method for forming a sealed cavity includes bonding a non-conductive structure to a first substrate to form a non-conductive aperture into the first substrate. On a surface of the non-conductive structure opposite the first substrate, the method includes depositing a first metal layer. The method further includes patterning a first iris in the first metal layer, depositing a first dielectric layer on a surface of the first metal layer opposite the non-conductive structure, and patterning an antenna on a surface of the first dielectric layer opposite the first metal layer. The method also includes creating a cavity in the first substrate, depositing a second metal layer on a surface of the cavity, patterning a second iris in the second metal layer, and bonding a second substrate to a surface of the first substrate opposite the non-conductive structure to thereby seal the cavity.

Patent Agency Ranking