SYSTEM AND METHOD FOR SIMULATING SIGNAL FLOW THROUGH A LOGIC BLOCK PATTERN OF A REAL TIME PROCESS CONTROL SYSTEM
    171.
    发明申请
    SYSTEM AND METHOD FOR SIMULATING SIGNAL FLOW THROUGH A LOGIC BLOCK PATTERN OF A REAL TIME PROCESS CONTROL SYSTEM 审中-公开
    通过实时过程控制系统的逻辑块模式模拟信号流的系统和方法

    公开(公告)号:WO1998014847A1

    公开(公告)日:1998-04-09

    申请号:PCT/US1997016555

    申请日:1997-09-17

    Applicant: HONEYWELL INC.

    Abstract: A testing system for, and method of, simulating signal flow through a logic block pattern of a real time process control system. The system includes: (1) a memory that contains a data base of input data associated with simulated sensors and a rule base containing control rules and constituting a logic block pattern and (2) a processor that operates in an arbitrary time base to apply the input data to the control rules to simulate signal flow through the logic block pattern and thereby produce simulated output data and real time control system responses thereby testing the logic block pattern, the memory and the processor being detached from the real time process control system to prevent use of resources thereof in connection with the logic block pattern testing.

    Abstract translation: 用于通过实时过程控制系统的逻辑块模式模拟信号流的测试系统和方法。 该系统包括:(1)存储器,其包含与模拟传感器相关联的输入数据的数据库和包含控制规则并构成逻辑块模式的规则库,以及(2)在任意时基操作以应用 输入数据到控制规则以模拟通过逻辑块模式的信号流,从而产生模拟输出数据和实时控制系统响应,从而测试逻辑块模式,存储器和处理器与实时过程控制系统分离以防止 使用与逻辑块模式测试相关的资源。

    GRAPHICAL TOOL FOR BATCH CONTROL
    172.
    发明申请
    GRAPHICAL TOOL FOR BATCH CONTROL 审中-公开
    用于批量控制的图形工具

    公开(公告)号:WO1998014845A1

    公开(公告)日:1998-04-09

    申请号:PCT/US1997017074

    申请日:1997-09-22

    Applicant: HONEYWELL INC.

    CPC classification number: G05B19/042 Y10S715/965 Y10S715/967

    Abstract: A system which comprises: a graphical tool which is capable of building batch or phase sequential steps and a smart device control (5) for input/output device control; a microprocessor (9) which is capable of running the phase sequential steps; and an I/O communication processor (24) which is capable of communicating the phase sequential steps to the input/output device (13).

    Abstract translation: 一种系统,包括:能够构建批次或相位顺序步骤的图形工具和用于输入/输出设备控制的智能设备控制(5); 能够运行相序步骤的微处理器(9); 以及能够将相序步骤传送到输入/输出装置(13)的I / O通信处理器(24)。

    METHOD FOR CONSTRAINING THE NUMBER OF DISPLAYS IN A MULTI-WINDOW COMPUTER ENVIRONMENT
    173.
    发明申请
    METHOD FOR CONSTRAINING THE NUMBER OF DISPLAYS IN A MULTI-WINDOW COMPUTER ENVIRONMENT 审中-公开
    在多窗口计算机环境中约束显示数量的方法

    公开(公告)号:WO1998013816A1

    公开(公告)日:1998-04-02

    申请号:PCT/US1997016400

    申请日:1997-09-15

    Applicant: HONEYWELL INC.

    CPC classification number: G09G5/14

    Abstract: A method constrains the number of displays which are simultaneously available to an operator on a display surface in a multi-windowed computer environment. Each display is displayed having predetermined display characteristics, including position and size, such that each display is in an assigned window which is a unique area of the display surface. The method comprises the steps of determining the display characteristics of a first application display which is about to be displayed. If a second application display is already being managed with the same display characteristics, the second application display is closed while maintaining the display characteristics from the first application display. The first application display is launched for display and is displayed in the same position as the closed second application display, thereby constraining the number of displays.

    Abstract translation: 一种方法约束在多窗口计算机环境中的显示表面上的操作者同时可用的显示器的数量。 显示每个显示器具有预定的显示特性,包括位置和大小,使得每个显示器在作为显示表面的唯一区域的分配窗口中。 该方法包括确定即将被显示的第一应用显示的显示特性的步骤。 如果已经以相同的显示特征管理第二应用程序显示,则在保持来自第一应用程序显示的显示特性的同时关闭第二应用程序显示。 第一应用程序显示被启动显示,并且显示在与关闭的第二应用程序显示相同的位置,从而约束显示数量。

    METHOD FOR CONSTRAINING THE AVAILABLE DISPLAY SURFACE IN WHICH APPLICATION DISPLAYS MAY BE RENDERED
    174.
    发明申请
    METHOD FOR CONSTRAINING THE AVAILABLE DISPLAY SURFACE IN WHICH APPLICATION DISPLAYS MAY BE RENDERED 审中-公开
    用于限制应用程序显示可以显示的可用显示表面的方法可以被渲染

    公开(公告)号:WO1998013752A1

    公开(公告)日:1998-04-02

    申请号:PCT/US1997016401

    申请日:1997-09-15

    Applicant: HONEYWELL INC.

    CPC classification number: G06F3/0481 G09G5/14

    Abstract: A method for constraining the available display surface in which an application display is displayed includes a display surface being divided into a predetermined number of windows. Each window is defined to have a unique area of the display surface and is assigned to a predetermined category of display. The method comprises the steps of modifying an application display in response to an input to modify the display. The modified display is verified to assure that the modified application display complies with specified parameters contained in a configuration file. The configuration file includes sizes and position parameters. If the modified application display does not comply with the specified parameters, the modified application display is changed to conform with the parameters of the configuration file and outputted for display.

    Abstract translation: 一种用于约束显示应用程序显示的可用显示面的方法包括被划分成预定数量的窗口的显示表面。 每个窗口被定义为具有显示表面的唯一区域并被分配给预定类别的显示。 该方法包括响应于输入修改应用显示以修改显示的步骤。 验证修改的显示以确保修改的应用显示符合配置文件中包含的指定参数。 配置文件包括大小和位置参数。 如果修改后的应用程序显示不符合指定的参数,修改后的应用程序显示将被更改为符合配置文件的参数并输出显示。

    METHOD OF DISPLAY CATEGORIZATION IN A MULTI-WINDOW DISPLAY
    175.
    发明申请
    METHOD OF DISPLAY CATEGORIZATION IN A MULTI-WINDOW DISPLAY 审中-公开
    在多窗口显示器中显示分类的方法

    公开(公告)号:WO1998013748A1

    公开(公告)日:1998-04-02

    申请号:PCT/US1997016072

    申请日:1997-09-11

    Applicant: HONEYWELL INC.

    CPC classification number: G09G5/14 G06F3/0481

    Abstract: A method of controlling a computer window display of a display system having a display surface of one or more physical screens, provides an integrated workspace wherein multiple applications are displayed, by category, in a coordinated, predetermined area of the display surface. In response to a request inputted to the display system, the requested application display is created. A category of the requested display is ascertained. A lookup is performed in a configuration file to find a match between the category of the requested display and an entry in the configuration file. When a match of categories is found, the display characteristic data is obtained to get the position and size of the display. A pointer points to the next available area of the display area for the category of interest, and the display is created to be positioned within the selected available window.

    Abstract translation: 一种控制具有一个或多个物理屏幕的显示表面的显示系统的计算机窗口显示的方法提供了集成的工作空间,其中多个应用按类别显示在显示表面的协调的预定区域中。 响应于输入到显示系统的请求,创建所请求的应用程序显示。 确定所请求的显示的类别。 在配置文件中执行查找,以查找请求的显示的类别和配置文件中的条目之间的匹配。 当找到类别的匹配时,获得显示特征数据以获得显示器的位置和大小。 指针指向感兴趣类别的显示区域的下一个可用区域,并且创建显示器以定位在所选择的可用窗口内。

    HERMETICALLY SEALED HOUSING HAVING A FLEX TAPE ELECTRICAL CONNECTOR
    176.
    发明申请
    HERMETICALLY SEALED HOUSING HAVING A FLEX TAPE ELECTRICAL CONNECTOR 审中-公开
    具有柔性带电气连接器的密封外壳

    公开(公告)号:WO1998009489A1

    公开(公告)日:1998-03-05

    申请号:PCT/US1997013045

    申请日:1997-08-06

    Applicant: HONEYWELL INC.

    CPC classification number: H05K5/062 H05K5/069

    Abstract: Disclosed is a hermetically sealed housing assembly for protecting electrical equipment. The housing assembly includes a hermetically sealed housing member having an exterior wall and an interior region for containing the electrical equipment. A flex tap electrical signal conductor extends through an opening in the exterior wall, and transmits electrical signals between the electrical equipment in the interior region and electrical components in a region exterior to the housing member. The flex tape signal conductor is hermetically sealed to the exterior wall of the housing member at the opening to maintain the integrity of the hermetic seal of the housing member even after temperature-cycling for a period of time.

    Abstract translation: 公开了一种用于保护电气设备的气密密封的壳体组件。 壳体组件包括具有外壁和用于容纳电气设备的内部区域的气密密封的壳体构件。 柔性抽头电信号导体延伸穿过外壁中的开口,并且在内部区域中的电气设备和壳体构件外部的区域中的电气部件之间传输电信号。 柔性带信号导体在开口处气密地密封到壳体构件的外壁,以便即使在温度循环一段时间之后也能保持壳体构件的气密密封的完整性。

    CMOS OUTPUT DRIVER WITH P-CHANNEL SUBSTRATE TRACKING FOR COLD SPARE CAPABILITY
    177.
    发明申请
    CMOS OUTPUT DRIVER WITH P-CHANNEL SUBSTRATE TRACKING FOR COLD SPARE CAPABILITY 审中-公开
    CMOS输出驱动器,具有用于冷量能力的P沟道基板跟踪

    公开(公告)号:WO1997044903A1

    公开(公告)日:1997-11-27

    申请号:PCT/US1997008139

    申请日:1997-05-13

    Applicant: HONEYWELL INC.

    CPC classification number: H03K19/00315

    Abstract: A CMOS output driver circuit (10) with p-channel substrate tracking provides an output driver to full power supply voltage (VDD). The circuit (10) is especially useful as a redundant circuit where its power supply connection (VDD) is connected to ground (VSS) and the circuit (10) is kept in unbiased storage until it is needed.

    Abstract translation: 具有p沟道衬底跟踪的CMOS输出驱动器电路(10)为全电源电压(VDD)提供输出驱动器。 电路(10)作为其电源连接(VDD)连接到地(VSS)的冗余电路是特别有用的,并且电路(10)在需要时保持在无偏压的存储中。

    DATA ERROR DETECTION AND CORRECTION FOR A SHARED SRAM
    179.
    发明申请
    DATA ERROR DETECTION AND CORRECTION FOR A SHARED SRAM 审中-公开
    用于共享SRAM的数据错误检测和校正

    公开(公告)号:WO1997014109A2

    公开(公告)日:1997-04-17

    申请号:PCT/US1996016037

    申请日:1996-10-07

    Applicant: HONEYWELL INC.

    CPC classification number: G11C29/74 G06F11/1032

    Abstract: An apparatus for correcting errors in information read from a memory unit, comprises a first and second memory, where primary and backup information are stored in predetermined addressable locations. The primary information and the backup information in corresponding locations are the same. A processor, commands a read of information stored in the memory unit, the read being a simultaneous read of the primary information and the corresponding backup information. A multiplexer, couples the output ports to the processor. The primary information read from the first and second memory and the backup information read from the first and second memory are coupled to the multiplexer. The first and second memory each indicate via a respective first and second error signal if an error is detected on the information just read from the first and second memory, respectively. Select logic determines whether the data in the first and second memory contains the primary or the backup information and generates the control signal to select the set of input ports to be the output of the multiplexer. The control signal selects the primary signal to be coupled to the processor if no error is indicated in the primary copy and selects the backup information to be coupled to the processor if an error is indicated in the primary copy and not the backup copy.

    Abstract translation: 一种用于校正从存储器单元读取的信息中的错误的装置,包括第一和第二存储器,其中主和备份信息存储在预定的可寻址位置。 相应位置的主要信息和备份信息相同。 处理器命令读取存储在存储器单元中的信息,读取是同时读取主信息和对应的备份信息。 多路复用器将输出端口耦合到处理器。 从第一和第二存储器读取的主要信息和从第一和第二存储器读取的备份信息被耦合到多路复用器。 如果在刚刚从第一和第二存储器读取的信息上检测到错误,则第一和第二存储器分别经由相应的第一和第二错误信号指示。 选择逻辑确定第一和第二存储器中的数据是否包含主要或备份信息,并产生控制信号,以选择一组输入端口作为多路复用器的输出。 如果主副本中没有指示错误,则控制信号选择要耦合到处理器的主信号,并且如果在主副本中指示错误而不是备份副本,则选择要耦合到处理器的备份信息。

    REDUNDANT PROCESSING SYSTEM ARCHITECTURE
    180.
    发明申请
    REDUNDANT PROCESSING SYSTEM ARCHITECTURE 审中-公开
    冗余处理系统架构

    公开(公告)号:WO1997011424A1

    公开(公告)日:1997-03-27

    申请号:PCT/US1996014971

    申请日:1996-09-18

    Applicant: HONEYWELL INC.

    CPC classification number: G06F11/183 G06F11/1675 G06F11/188

    Abstract: Disclosed is a fault-tolerant and/or fail-safe information processing system architecture for handling information from a plurality of independent subsystems which provide information related to selected input quantities, and which includes a plurality of redundant information processors for deriving specific processor output data as a function of the selected subsystem input quantities.

    Abstract translation: 公开了一种用于处理来自多个独立子系统的信息的容错和/或故障安全信息处理系统架构,其提供与所选择的输入量相关的信息,并且包括多个冗余信息处理器,用于将特定处理器输出数据导出为 所选子系统输入量的函数。

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