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    Method And Arrangement For Interference Mitigation
    184.
    发明申请
    Method And Arrangement For Interference Mitigation 有权
    干扰减轻的方法和布置

    公开(公告)号：US20150105091A1

    公开(公告)日：2015-04-16

    申请号：US14576553

    申请日：2014-12-19

    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)

    Inventor： Bo Hagerman ,  Fredrik Gunnarsson

    IPC: H04W72/08

    CPC classification number: H04W72/082 ,  H04B1/7103 ,  H04B1/7105 ,  H04B2201/70711 ,  H04Q2213/13098

    Abstract: In a method of interference mitigation in a multi user detection capable radio base station in a communication system, which radio base station comprises a set of confined detection modules, at least one of which is capable of handling multiple user connections, first and at least a second subset of detection modules are formed from said set, wherein the second set comprises at least one interference mitigation capable detection module. Interference information from the first subset is communicated to the second subset, interference originating in user connections of the first subset are then mitigated from the user connections of the second subset. Subsequently, interference is mutually mitigated between the connections within the interference mitigation capable detection module.

    Abstract translation: 在通信系统中的具有多用户检测能力的无线电基站中的干扰减轻的方法中，该无线电基站包括一组限制检测模块，其中至少一个能够处理多个用户连接，首先和至少一个 检测模块的第二子集由所述集合形成，其中所述第二集合包括至少一个具有干扰抑制能力的检测模块。 来自第一子集的干扰信息被传送到第二子集，然后从第二子集的用户连接中减轻源自第一子集的用户连接的干扰。 随后，干扰减轻能力检测模块之间的连接之间相互减轻干扰。

    Synchronization processing circuit and synchronization processing method in wireless communication system
    185.
    发明授权
    Synchronization processing circuit and synchronization processing method in wireless communication system 有权
    无线通信系统中的同步处理电路和同步处理方法

    公开(公告)号：US08711902B2

    公开(公告)日：2014-04-29

    申请号：US13144481

    申请日：2009-12-21

    Applicant: Toshiki Takeuchi

    Inventor： Toshiki Takeuchi

    IPC: H04B1/00

    CPC classification number: H04B1/7095 ,  H04B1/70735 ,  H04B1/7075 ,  H04B1/7093 ,  H04B2201/70711

    Abstract: In a synchronization processing circuit in a wireless communication system, a correlation operation unit is designed to have a parallel structure which can be restructured to improve flexibility in order to cope with various synchronization processings in a plurality of radio systems.The synchronization processing circuit in the wireless communication system comprises a plurality of correlation operation modules 31 through 3N that execute correlation operation, each of which correlation operation modules includes a plurality of correlators 60, a plurality of shift registers 50 for shifting a correlation code, an interface which transfers a shifted correlation code to an adjacent correlation operation unit for timing correlation processing, and a correlation code selection unit 40 which selects an externally and individually applied correlation code for code correlation processing and a correlation code transferred from an adjacent correlation operation unit as the correlation code.

    Abstract translation: 在无线通信系统中的同步处理电路中，相关运算部被设计为具有可重构的并行结构，以提高灵活性，以应对多个无线电系统中的各种同步处理。 无线通信系统中的同步处理电路包括执行相关操作的多个相关运算模块31至3N，每个相关运算模块包括多个相关器60，用于移位相关码的多个移位寄存器50， 将相移代码转移到用于定时相关处理的相邻相关运算单元的接口，以及相关代码选择单元40，其选择用于代码相关处理的外部和单独应用的相关代码和从相邻相关运算单元传送的相关代码作为 相关代码。

    Rake receiver architecture within a WCDMA terminal
    187.
    发明授权
    Rake receiver architecture within a WCDMA terminal 失效
    WCDMA终端内的Rake接收机架构

    公开(公告)号：US08472410B2

    公开(公告)日：2013-06-25

    申请号：US12718858

    申请日：2010-03-05

    Applicant: Mark David Hahm ,  Huaiyu (Hanks) Zeng ,  Joseph Boccuzzi ,  Nelson R. Sollenberger

    Inventor： Mark David Hahm ,  Huaiyu (Hanks) Zeng ,  Joseph Boccuzzi ,  Nelson R. Sollenberger

    IPC: H04B7/216 ,  H04B1/00

    CPC classification number: H04B1/7115 ,  H04B1/712 ,  H04B2201/70711

    Abstract: A baseband processing module includes an RX interface, a rake receiver combiner module, and may include additional components. The RX interface receives the baseband signals from an RF front end and creates baseband RX signal samples there from. The rake receiver combiner module includes control logic, an input buffer, a rake despreader module, and an output buffer. The rake despreader module is operable to despread the baseband RX signal samples in a time divided fashion to produce channel symbols including pilot channel symbols and physical channel symbols.

    Abstract translation: 基带处理模块包括RX接口，耙式接收器组合器模块，并且可以包括附加组件。 RX接口从RF前端接收基带信号，并从中创建基带RX信号样本。 耙式接收器组合器模块包括控制逻辑，输入缓冲器，耙式解扩器模块和输出缓冲器。 耙式解扩器模块可操作地以时分方式解扩基带RX信号采样，以产生包括导频信道符号和物理信道符号的信道符号。

    Apparatus, module, and method for implementing communications functions
    188.
    发明授权
    Apparatus, module, and method for implementing communications functions 有权
    用于实现通信功能的装置，模块和方法

    公开(公告)号：US08406281B2

    公开(公告)日：2013-03-26

    申请号：US12607916

    申请日：2009-10-28

    Applicant: Ghobad Heidari ,  Kuor-Hsin Chang ,  Paul L. Master ,  Eugene B. Hogenauer ,  Walter James Scheuermann

    Inventor： Ghobad Heidari ,  Kuor-Hsin Chang ,  Paul L. Master ,  Eugene B. Hogenauer ,  Walter James Scheuermann

    IPC: H04B1/707

    CPC classification number: G06F15/7867 ,  H04B1/708 ,  H04B2201/70711

    Abstract: A system acquisition module and corresponding method for facilitating PN code searching which has a PN sequence generator configurable to generate a plurality of PN sequences. The module and method also includes computational units configurable to correlate each received signal sample of a plurality of received signal samples with a corresponding PN sequence of the plurality of PN sequences, and further configurable to provide other hardware resources. A number of computational units from the plurality of computational units are selectively configured to correlate the received signal samples with the PN sequences—the number depending upon availability of the plurality of computational units from providing the other hardware resources. In another embodiment, a communication device having a system acquisition function is provided which includes the system acquisition module and a receiver configured to receive signals, where a plurality of configurable computational units are selectively configurable to implement the PN sequence generator.

    Abstract translation: 一种用于促进PN码搜索的系统采集模块和相应方法，其具有可配置成产生多个PN序列的PN序列发生器。 该模块和方法还包括可配置为将多个接收信号样本中的每个接收信号样本与多个PN序列中的相应PN序列相关联的计算单元，并且还可配置为提供其他硬件资源。 来自多个计算单元的多个计算单元被选择性地配置为将接收到的信号采样与PN序列相关联 - 取决于多个计算单元的可用性从提供其他硬件资源的数量。 在另一个实施例中，提供了具有系统获取功能的通信设备，其包括系统获取模块和被配置为接收信号的接收器，其中多个可配置的计算单元被选择性地配置以实现PN序列发生器。

    Method and apparatus for joint detection
    189.
    发明授权
    Method and apparatus for joint detection 有权
    联合检测方法和装置

    公开(公告)号：US07916841B2

    公开(公告)日：2011-03-29

    申请号：US11545857

    申请日：2006-10-11

    Applicant: Aiguo Yan ,  Lidwine Martinot ,  Marko Kocic ,  Paul D. Krivacek ,  Thomas J. Barber, Jr. ,  John Zijun Shen

    Inventor： Aiguo Yan ,  Lidwine Martinot ,  Marko Kocic ,  Paul D. Krivacek ,  Thomas J. Barber, Jr. ,  John Zijun Shen

    IPC: H04M1/64 ,  H04L25/49

    CPC classification number: H04B1/7105 ,  H04B2201/70711

    Abstract: A joint detection system and associated methods are provided. The joint detection system is configured to perform joint detection of received signals and includes a joint detector accelerator and a programmable digital signal processor (DSP). The joint detector accelerator is configured to perform front-end processing of first data inputted to the joint detector accelerator and output second data resulting from the front-end processing. The joint detector accelerator is further configured to perform back-end processing using at least third data inputted to the joint detector accelerator. The programmable DSP is coupled to the joint detector accelerator, and the programmable DSP is programmed to perform at least one intermediate processing operation using the second data outputted by the joint detector accelerator. The programmable DSP is further programmed to output the third data resulting from the intermediate processing operation to the joint detector accelerator.

    Abstract translation: 提供联合检测系统及相关方法。 联合检测系统被配置为执行接收信号的联合检测，并且包括联合检测器加速器和可编程数字信号处理器（DSP）。 联合检测器加速器被配置为执行输入到联合检测器加速器的第一数据的前端处理，并输出从前端处理得到的第二数据。 联合检测器加速器还被配置为使用输入到联合检测器加速器的至少第三数据来执行后端处理。 可编程DSP耦合到联合检测器加速器，并且可编程DSP被编程为使用由联合检测器加速器输出的第二数据执行至少一个中间处理操作。 可编程DSP进一步编程为将由中间处理操作产生的第三数据输出到联合检测器加速器。

    MULTIPLEXED CDMA AND GPS SEARCHING
    190.
    发明申请
    MULTIPLEXED CDMA AND GPS SEARCHING 失效
    多路复用CDMA和GPS搜索

    公开(公告)号：US20100222076A1

    公开(公告)日：2010-09-02

    申请号：US12776071

    申请日：2010-05-07

    Applicant: Wang Paul Poon ,  Qiuzhen Zou

    Inventor： Wang Paul Poon ,  Qiuzhen Zou

    IPC: H04W64/00

    CPC classification number: H04B1/708 ,  G01S19/30 ,  G01S19/34 ,  G01S19/37 ,  H04B1/70754 ,  H04B1/70758 ,  H04B2201/70711

    Abstract: Searcher hardware is multiplexed to perform simultaneous searches in either an IS-95 CDMA mode or a GPS mode. In the IS-95 mode, the search hardware is time-multiplexed into a number of searcher time slices, each of which can generate a PN sequence to despread a data sequence. In the GPS mode, the search hardware is configured as a number of distinct GPS channels, each of which can generate a Gold code sequence for tracking a GPS signal from a particular GPS satellite. This configuration allows the searcher to perform multiple GPS signal searches simultaneously. Signal searching in both IS-95 and GPS modes is performed at significantly higher speeds compared to conventional searcher hardware. Moreover, the search hardware can be dynamically configured to operate in either the IS-95 or the GPS mode, eliminating the need for dedicated circuitry for each mode of operation.

    Abstract translation: 搜索硬件被复用以在IS-95 CDMA模式或GPS模式中执行同时搜索。 在IS-95模式中，搜索硬件被时分复用到多个搜索器时间片中，每个搜索时间片可以产生PN序列来解扩数据序列。 在GPS模式中，搜索硬件被配置为多个不同的GPS信道，每个通道可以生成用于跟踪来自特定GPS卫星的GPS信号的金码序列。 该配置允许搜索者同时执行多个GPS信号搜索。 与传统的搜索器硬件相比，在IS-95和GPS模式下的信号搜索以更高的速度执行。 而且，搜索硬件可以被动态配置为在IS-95或GPS模式中操作，从而消除了对于每个操作模式的专用电路的需要。

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