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    Monolithic integrated resistance structure having power igbt device
    12.
    发明专利
    Monolithic integrated resistance structure having power igbt device 审中-公开
    具有功率IGBT器件的单片集成电阻结构

    公开(公告)号：JP2005033199A

    公开(公告)日：2005-02-03

    申请号：JP2004196957

    申请日：2004-07-02

    Applicant: Stmicroelectronics Srl ,  エスティーマイクロエレクトロニクスエス.アール.エル.STMicroelectronics S.r.l.

    Inventor： PATTI DAVIDE ,  TORRES ANTONINO

    IPC: H01L29/739 ,  H01L29/78

    CPC classification number: H01L29/7395

    Abstract: PROBLEM TO BE SOLVED: To provide a monolithic integrated high-voltage resistance structure having an IGBT(insulated gate bipolar transistor) device which has structural and functional characteristics capable of suppressing the occurrence of a parasitic transistor and which overcomes a limited condition and defect affecting the above conventional devices.
    SOLUTION: In the device in which a second conductive semiconductor layer(19) is integrated on a laminated first conductive semiconductor substrate(16) and which includes a resistance structure(17) for voltage control and an IGBT device(18), the resistance structure(17) surrounds a part(22) of the semiconductor layer(19), shows the first conductive type, and includes at least one of substantially ring-like regions(21a).
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种具有IGBT（绝缘栅双极晶体管）器件的单片集成高压电阻结构，其具有能够抑制寄生晶体管的发生并且克服有限的条件的结构和功能特性， 缺陷影响上述常规设备。 解决方案：在第二导电半导体层（19）集成在层叠的第一导电半导体衬底（16）上并且包括用于电压控制的电阻结构（17）和IGBT器件（18）的器件中， 电阻结构（17）围绕半导体层（19）的部分（22），显示出第一导电类型，并且包括至少一个基本上呈环状的区域（21a）。 版权所有（C）2005，JPO＆NCIPI

    Memory device with ramp-like voltage biasing structure based on current generator
    15.
    发明专利
    Memory device with ramp-like voltage biasing structure based on current generator 有权
    基于电流发生器的具有偏置电压偏置结构的存储器件

    公开(公告)号：JP2006294213A

    公开(公告)日：2006-10-26

    申请号：JP2006015176

    申请日：2006-01-24

    Applicant: Stmicroelectronics Srl ,  エスティーマイクロエレクトロニクスエス.アール.エル.STMicroelectronics S.r.l.

    Inventor： SFORZIN MARCO ,  DEL GATTO NICOLA ,  FERRARIO MARCO ,  CONFALONIERI EMANUELE

    IPC: G11C16/06 ,  G11C16/02

    CPC classification number: G11C16/26

    Abstract: PROBLEM TO BE SOLVED: To provide a memory device generating bias voltage varied temporally and monotonously with a simple configuration. SOLUTION: This memory device (100) is provided with a plurality of memory cells (MC) storing a value respectively, at least one reference cell (Mr 0 to Mr 2 ), a bias means (115) for applying bias voltage (Vc, Vr) having a pattern of almost monotonous temporal time variation to a selected one group of the memory cells and at least the one reference cell, a means (130) detecting that current of the selected each memory cell and each reference cell reached the threshold value, and a means (145) for specifying a value stored in selected each memory cell conforming to time relation in which a current of the selected memory cell reaches the threshold value and a current of at least the one reference cell reaches the threshold value. The bias means is provided with a means (305) supplying the prescribed biasing current (Ib) to the selected memory cell and at least the one reference cell. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种利用简单配置产生时间上和单调变化的偏置电压的存储器件。 解决方案：该存储装置（100）具有分别存储值的多个存储单元（MC），至少一个参考单元（Mr 0 Mr Mr SB < 用于将具有几乎单调的时间变化的图案的偏置电压（Vc，Vr）施加到所选择的一组存储器单元和至少一个参考单元的偏置装置（115），装置（130） 检测所选择的每个存储单元和每个参考单元的电流达到阈值;以及用于指定存储在所选择的每个存储器单元中的值的装置（145），其符合所选存储单元的电流达到阈值的时间关系 值和至少一个参考单元的电流达到阈值。 偏置装置设置有将规定的偏置电流（Ib）提供给所选择的存储单元和至少一个参考单元的装置（305）。 版权所有（C）2007，JPO＆INPIT

    Prediction current control at time of driving load in pulse width modulation mode
    18.
    发明专利
    Prediction current control at time of driving load in pulse width modulation mode 有权
    脉冲宽度调制模式下驱动负载时的预测电流控制

    公开(公告)号：JP2010148349A

    公开(公告)日：2010-07-01

    申请号：JP2009281976

    申请日：2009-12-11

    Applicant: Stmicroelectronics Srl ,  エスティーマイクロエレクトロニクスエス.アール.エルSTMicroelectronics S.r.l.

    Inventor： BAGARELLI FULVIO GIACOMO ,  MARANO VINCENZO

    IPC: H02M3/155

    CPC classification number: H02M3/157 ,  H02M2001/0019 ,  H02M2003/1555

    Abstract: PROBLEM TO BE SOLVED: To provide a method for controlling a load current even when a current ripple significantly varies. SOLUTION: The method includes: (A) a step of setting a threshold value of a comparator in correspondence to a reference current value for a load; (B) a step of measuring a first time interval from an active ON state of an ON phase of a power stage to a point of time when the load current reaches the reference current value; and (C) a step of continuously maintaining the power stage in the ON phase. Step (C) is performed while the power stage is further maintained in the predictive ON state for an additional time interval. The additional time interval is determined based on an average value of the first time interval and a time interval of the active ON state measured during a past PWM (pulse width modulation) cycle. COPYRIGHT: (C)2010,JPO&INPIT

    Abstract translation: 要解决的问题：即使当电流纹波显着变化时，也提供用于控制负载电流的方法。 该方法包括：（A）与负载的基准电流值对应地设定比较器的阈值的步骤; （B）从功率级的导通相的有效接通状态到负载电流达到基准电流值的时刻的第一时间间隔的步骤; 和（C）在ON阶段连续地保持功率级的步骤。 在功率级进一步保持在预测接通状态下进行另外的时间间隔时，执行步骤（C）。 基于第一时间间隔的平均值和在过去的PWM（脉冲宽度调制）周期期间测量的有效接通状态的时间间隔来确定附加时间间隔。 版权所有（C）2010，JPO＆INPIT

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