Driving circuit for electric load and system comprising the circuit
    17.
    发明专利
    Driving circuit for electric load and system comprising the circuit 审中-公开
    用于电力负载和包含电路的系统的驱动电路

    公开(公告)号:JP2011030227A

    公开(公告)日:2011-02-10

    申请号:JP2010168707

    申请日:2010-07-27

    CPC classification number: H02H5/10 H02H7/12 H02M3/156 H02M2003/1555

    Abstract: PROBLEM TO BE SOLVED: To provide a driving circuit for an electric load, which detects a state of a load connected erroneously.
    SOLUTION: An electronic circuit (100) is disclosed, having: a node (EX) connectable to a load (LD) to be driven; and a power device (PD) with a first terminal connected to the node, to be switched between activation and deactivation. The circuit further has: a current generator (I) having an output connected to the node, which can be switched to an enabled state, at least when the power device is deactivated; and a comparator (CP) for comparing a voltage of the node (V(EX)) with a reference voltage (V(REF)). The comparator is configured to obtain comparison results (RESETN), from which a distinct condition of electric connection of the load to the node is detected.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:提供用于检测错误连接的负载的状态的电负载的驱动电路。 解决方案:公开了一种电子电路(100),其具有:可连接到待驱动的负载(LD)的节点(EX) 以及具有连接到节点的第一终端的功率设备(PD),以在激活和去激活之间切换。 该电路还具有:电流发生器(I),具有连接到该节点的输出端,该输出端可以切换到使能状态,至少当功率设备被去激活时; 以及用于将节点(V(EX))的电压与参考电压(V(REF))进行比较的比较器(CP)。 比较器被配置为获得比较结果(RESETN),从而检测负载与节点的电连接的不同条件。 版权所有(C)2011,JPO&INPIT

    Digital noise protection circuit and method
    18.
    发明专利
    Digital noise protection circuit and method 审中-公开
    数字噪声保护电路及方法

    公开(公告)号:JP2011019212A

    公开(公告)日:2011-01-27

    申请号:JP2010102336

    申请日:2010-04-27

    CPC classification number: H03K19/173 H03K5/1252

    Abstract: PROBLEM TO BE SOLVED: To provide a method of protection from noise of a digital signal generated by a comparator.SOLUTION: The method of protection from noise of a digital signal (Vcomp) includes: a step of generating an output signal (Vout) which switches from a first logic state to a second logic state at a first switching of logic state of the digital signal (Vcomp) generated by a comparator 1; a step of detecting a change from the first logic state to the second logic state of the output signal (Vout); and a step of inhibiting further switchings of the output signal (Vout) for a first time interval after change from the first logic state to the second logic state.

    Abstract translation: 要解决的问题:提供一种防止由比较器产生的数字信号的噪声的方法。解决方案:防止数字信号(Vcomp)的噪声的方法包括:产生输出信号(Vout)的步骤,其中, 在由比较器1产生的数字信号(Vcomp)的逻辑状态的第一次切换时,从第一逻辑状态切换到第二逻辑状态; 检测从输出信号(Vout)的第一逻辑状态到第二逻辑状态的变化的步骤; 以及在从第一逻辑状态改变到第二逻辑状态之后,在第一时间间隔之后禁止进一步切换输出信号(Vout)的步骤。

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